Searched refs:performance (Results 1 – 25 of 643) sorted by relevance
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4 $id: http://devicetree.org/schemas/dvfs/performance-domain.yaml#7 title: Generic performance domains13 This binding is intended for performance management of groups of devices or14 CPUs that run in the same performance domain. Performance domains must not15 be confused with power domains. A performance domain is defined by a set16 of devices that always have to run at the same performance level. For a given17 performance domain, there is a single point of control that affects all the18 devices in the domain, making it impossible to set the performance level of21 have a common frequency control, is said to be in the same performance24 This device tree binding can be used to bind performance domain consumer[all …]
80 if (ppc >= pr->performance->state_count || in acpi_processor_get_platform_limit()85 pr->performance->states[ppc].core_frequency * 1000); in acpi_processor_get_platform_limit()113 if (ignore_ppc || !pr->performance) { in acpi_processor_ppc_has_changed()143 if (!pr || !pr->performance || !pr->performance->state_count) in acpi_processor_get_bios_limit()145 *limit = pr->performance->states[pr->performance_platform_limit]. in acpi_processor_get_bios_limit()224 memcpy(&pr->performance->control_register, obj.buffer.pointer, in acpi_processor_get_performance_control()241 memcpy(&pr->performance->status_register, obj.buffer.pointer, in acpi_processor_get_performance_control()312 pr->performance->state_count = pss->package.count; in acpi_processor_get_performance_states()313 pr->performance->states = in acpi_processor_get_performance_states()317 if (!pr->performance->states) { in acpi_processor_get_performance_states()[all …]
13 performance of a logical processor on a contiguous and abstract performance14 scale. CPPC exposes a set of registers to describe abstract performance scale,15 to request performance levels and to measure per-cpu delivered performance.40 * highest_perf : Highest performance of this processor (abstract scale).41 * nominal_perf : Highest sustained performance of this processor43 * lowest_nonlinear_perf : Lowest performance of this processor with nonlinear45 * lowest_perf : Lowest performance of this processor (abstract scale).49 The above frequencies should only be used to report processor performance in53 * feedback_ctrs : Includes both Reference and delivered performance counter.54 Reference counter ticks up proportional to processor's reference performance.[all …]
10 These attributes list properties of fan performance states.37 where each of the "state*" files represents one performance state of the fan47 to this performance state (0-9).71 Here use can look at fan performance states for a reference speed (speed_rpm)74 not defined in the performance states.80 This sysfs attribute is presented in the same directory as performance states.90 in the same directory as performance states.
29 "#performance-domain-cells":31 Number of cells in a performance domain specifier.33 performance domains.39 - "#performance-domain-cells"53 performance-domains = <&performance 0>;64 performance: performance-controller@11bc00 {68 #performance-domain-cells = <1>;
16 ``amd-pstate`` is the AMD CPU performance scaling driver that introduces a24 communicate the performance hints to hardware.27 ``ondemand``, etc. to manage the performance hints which are provided by40 continuous, abstract, and unit-less performance value in a scale that is41 not tied to a specific performance state / frequency. This is an ACPI42 standard [2]_ which software can specify application performance goals and45 interpreter for performance adjustments. ``amd-pstate`` will initialize a47 to manage each performance update behavior. ::94 This is the absolute maximum performance an individual processor may reach,95 assuming ideal conditions. This performance level may not be sustainable[all …]
8 collection of features that give more granular control over CPU performance.9 With Intel(R) SST, one server can be configured for power and performance for a15 …tel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enhancing-performance.pdf25 how these commands change the power and performance profile of the system under83 performance requirements. This helps users during deployment as they do not have86 that allows multiple optimized performance profiles per system. Each profile89 performance profile and meet CPU online/offline requirement, the user can expect93 Number or performance levels96 There can be multiple performance profiles on a system. To get the number of111 On this system under test, there are 4 performance profiles in addition to the[all …]
17 performance, SoCs have internal algorithms for scaling uncore frequency. These20 It is possible that users have different expectations of uncore performance and22 the scaling min/max frequencies via cpufreq sysfs to improve CPU performance.25 different core and uncore performance at distinct phases and they may want to27 improve overall performance.
5 tristate "Intel uncore performance events"9 Include support for Intel uncore performance events. These are13 tristate "Intel/AMD rapl performance events"17 Include support for Intel and AMD rapl performance events for power21 tristate "Intel cstate performance events"25 Include support for Intel cstate performance events for power38 tristate "AMD Uncore performance events"42 Include support for AMD uncore performance events for use with
13 and performance14 balanced-performance Balance between performance and low16 towards performance17 performance High performance operation
7 performance impact notification (FPIN) event.15 performance impact notification (FPIN) event.23 performance impact notification (FPIN) event.
14 depends on the nature of data that perf_events performance monitoring15 units (PMU) [2]_ and Perf collect and expose for performance analysis.16 Collected system and performance data may be split into several21 its topology, used kernel and Perf versions, performance monitoring30 faults, CPU migrations), architectural hardware performance counters46 So, perf_events performance monitoring and observability operations are56 all kernel security permission checks so perf_events performance70 as privileged processes with respect to perf_events performance73 privilege [13]_ (POSIX 1003.1e: 2.2.2.39) for performance monitoring and75 performance monitoring and observability in the system.[all …]
6 Support for HiSilicon SoC L3 Cache performance monitor, Hydra Home7 Agent performance monitor and DDR Controller performance monitor.13 Provide support for HiSilicon PCIe performance monitoring unit (PMU)
5 On modern systems the platform performance, temperature, fan and other13 operation or towards performance.19 NOT a goal of this API to allow monitoring the resulting performance20 characteristics. Monitoring performance is best done with device/vendor23 Specifically when selecting a high performance profile the actual achieved24 performance may be limited by various factors such as: the heat generated28 performance level.
7 - Identify worst case performance loss when doing dynamic frequency12 - Identify cpufreq related performance regressions between kernels18 - Power saving related regressions (In fact as better the performance28 For that purpose, it compares the performance governor to a configured56 takes on this machine and needs to be run in a loop using the performance58 Then the above test runs are processed using the performance governor61 on full performance and you get the overall performance loss.80 trigger of the cpufreq-bench, you will see no performance loss (compare with84 will always see 50% loads and you get worst performance impact never
145 dst_states = kcalloc(_pr->performance->state_count, in xen_copy_pss_data()150 dst_perf->state_count = _pr->performance->state_count; in xen_copy_pss_data()151 for (i = 0; i < _pr->performance->state_count; i++) { in xen_copy_pss_data()153 memcpy(&(dst_states[i]), &(_pr->performance->states[i]), in xen_copy_pss_data()169 dst->shared_type = _pr->performance->shared_type; in xen_copy_psd_data()171 pdomain = &(_pr->performance->domain_info); in xen_copy_psd_data()220 xen_copy_pct_data(&(_pr->performance->control_register), in push_pxx_to_hypervisor()222 xen_copy_pct_data(&(_pr->performance->status_register), in push_pxx_to_hypervisor()247 perf = _pr->performance; in push_pxx_to_hypervisor()280 if (_pr->performance && _pr->performance->states) in upload_pm_data()[all …]
11 the power consumed by devices at various performance levels, and the kernel68 'performance domain' in the system. A performance domain is a group of CPUs69 whose performance is scaled together. Performance domains generally have a70 1-to-1 mapping with CPUFreq policies. All CPUs in a performance domain are71 required to have the same micro-architecture. CPUs in different performance84 2.2 Registration of performance domains93 the real power measurements performed for each performance state. Thus, this97 Drivers are expected to register performance domains into the EM framework by104 for each performance state. The callback function provided by the driver is free107 performance domains using cpumask. For other devices than CPUs the last[all …]
56 Say y if you want to use CPU performance monitors on ARM-based64 Say y if you want to use CPU performance monitors on RISCV-based74 Say y if you want to use the legacy CPU performance monitor84 Say y if you want to use the CPU performance monitor107 Provides support for performance monitor unit in ARM DynamIQ Shared116 Provides support for the DDR performance monitor in i.MX8, which125 Provides support for the L2 cache performance monitor unit (PMU)135 Provides support for the L3 cache performance monitor unit (PMU)155 Say y if you want to use APM X-Gene SoC performance monitors.177 performance monitors on CN10K family silicons.
53 System call performance (throughput).56 Memory access performance.76 Suite for evaluating performance of scheduler and IPC mechanisms.146 Suite for evaluating performance of core system call throughput (both usecs/op and ops/sec metrics).154 Suite for evaluating performance of simple memory copy in various ways.178 Suite for evaluating performance of simple memory set in various ways.234 Suite for evaluating perf's event synthesis performance.
14 The HFI gives the operating system a performance and energy efficiency22 about the performance and energy efficiency of each CPU in the system. Each24 indicate higher capability. Energy efficiency and performance are reported in35 excessive heat, the HFI may reflect reduced performance on specific CPUs.38 task placement decisions. For instance, if either the performance or energy41 that processor for performance or energy efficiency reasons, respectively.
27 tristate "performance tests for RCU"33 This option provides a kernel module that runs performance37 Say Y here if you want RCU performance tests to be built into39 Say M if you want the RCU performance tests to build as a module.65 This option provides a kernel module that runs performance tests70 Say Y here if you want these performance tests built into the kernel.131 lifetime and kills performance. Don't try this on large
38 performance [inst/s]48 while still getting 'good' performance. It is essentially an alternative49 optimization objective to the current performance-only objective for the51 performance.78 task/CPU is, and to take this into consideration when evaluating performance vs84 per 'performance domain' in the system (see Documentation/power/energy-model.rst85 for futher details about performance domains).89 scheduler maintains a singly linked list of all performance domains intersecting95 necessarily match those of performance domains, the lists of different root99 Let us consider a platform with 12 CPUs, split in 3 performance domains[all …]
171 u16 performance; member211 u8 performance:1; member235 struct acpi_processor_performance *performance; member256 __percpu *performance);259 *performance, unsigned int cpu);
14 high performance analog to digital conversion, 4 channels of high15 performance digital to analog conversion for audio, and 1 channel of19 standard audio grade DAC, with performance specifications identical