Searched refs:patched_crtc_timing (Results 1 – 4 of 4) sorted by relevance
149 struct dc_crtc_timing patched_crtc_timing; in optc1_program_timing() local166 patched_crtc_timing = *dc_crtc_timing; in optc1_program_timing()167 apply_front_porch_workaround(&patched_crtc_timing); in optc1_program_timing()173 OTG_H_TOTAL, patched_crtc_timing.h_total - 1); in optc1_program_timing()178 OTG_H_SYNC_A_END, patched_crtc_timing.h_sync_width); in optc1_program_timing()181 asic_blank_start = patched_crtc_timing.h_total - in optc1_program_timing()182 patched_crtc_timing.h_front_porch; in optc1_program_timing()186 patched_crtc_timing.h_border_right - in optc1_program_timing()187 patched_crtc_timing.h_addressable - in optc1_program_timing()188 patched_crtc_timing.h_border_left; in optc1_program_timing()[all …]
3592 struct dc_crtc_timing patched_crtc_timing; in dcn10_get_vupdate_offset_from_vsync() local3598 patched_crtc_timing = *dc_crtc_timing; in dcn10_get_vupdate_offset_from_vsync()3599 apply_front_porch_workaround(&patched_crtc_timing); in dcn10_get_vupdate_offset_from_vsync()3601 interlace_factor = patched_crtc_timing.flags.INTERLACE ? 2 : 1; in dcn10_get_vupdate_offset_from_vsync()3603 vesa_sync_start = patched_crtc_timing.v_addressable + in dcn10_get_vupdate_offset_from_vsync()3604 patched_crtc_timing.v_border_bottom + in dcn10_get_vupdate_offset_from_vsync()3605 patched_crtc_timing.v_front_porch; in dcn10_get_vupdate_offset_from_vsync()3607 asic_blank_end = (patched_crtc_timing.v_total - in dcn10_get_vupdate_offset_from_vsync()3609 patched_crtc_timing.v_border_top) in dcn10_get_vupdate_offset_from_vsync()
286 struct dc_crtc_timing patched_crtc_timing; in dce110_timing_generator_program_timing_generator() local303 patched_crtc_timing = *dc_crtc_timing; in dce110_timing_generator_program_timing_generator()305 dce110_timing_generator_apply_front_porch_workaround(tg, &patched_crtc_timing); in dce110_timing_generator_program_timing_generator()309 bp_params.h_total = patched_crtc_timing.h_total; in dce110_timing_generator_program_timing_generator()311 patched_crtc_timing.h_addressable; in dce110_timing_generator_program_timing_generator()312 bp_params.v_total = patched_crtc_timing.v_total; in dce110_timing_generator_program_timing_generator()313 bp_params.v_addressable = patched_crtc_timing.v_addressable; in dce110_timing_generator_program_timing_generator()316 bp_params.h_sync_width = patched_crtc_timing.h_sync_width; in dce110_timing_generator_program_timing_generator()318 bp_params.v_sync_width = patched_crtc_timing.v_sync_width; in dce110_timing_generator_program_timing_generator()322 patched_crtc_timing.h_border_left; in dce110_timing_generator_program_timing_generator()[all …]
1244 struct dc_crtc_timing patched_crtc_timing; in dcn20_adjust_adaptive_sync_v_startup() local1249 patched_crtc_timing = *dc_crtc_timing; in dcn20_adjust_adaptive_sync_v_startup()1251 if (patched_crtc_timing.flags.INTERLACE == 1) { in dcn20_adjust_adaptive_sync_v_startup()1252 if (patched_crtc_timing.v_front_porch < 2) in dcn20_adjust_adaptive_sync_v_startup()1253 patched_crtc_timing.v_front_porch = 2; in dcn20_adjust_adaptive_sync_v_startup()1255 if (patched_crtc_timing.v_front_porch < 1) in dcn20_adjust_adaptive_sync_v_startup()1256 patched_crtc_timing.v_front_porch = 1; in dcn20_adjust_adaptive_sync_v_startup()1260 asic_blank_start = patched_crtc_timing.v_total - in dcn20_adjust_adaptive_sync_v_startup()1261 patched_crtc_timing.v_front_porch; in dcn20_adjust_adaptive_sync_v_startup()1265 patched_crtc_timing.v_border_bottom - in dcn20_adjust_adaptive_sync_v_startup()[all …]