| /linux-5.19.10/drivers/clk/imx/ |
| D | clk-pllv3.c | 111 unsigned long parent_rate) in clk_pllv3_recalc_rate() argument
116 return (div == 1) ? parent_rate * 22 : parent_rate * 20; in clk_pllv3_recalc_rate()
122 unsigned long parent_rate = *prate; in clk_pllv3_round_rate() local
124 return (rate >= parent_rate * 22) ? parent_rate * 22 : in clk_pllv3_round_rate()
125 parent_rate * 20; in clk_pllv3_round_rate()
129 unsigned long parent_rate) in clk_pllv3_set_rate() argument
134 if (rate == parent_rate * 22) in clk_pllv3_set_rate()
136 else if (rate == parent_rate * 20) in clk_pllv3_set_rate()
159 unsigned long parent_rate) in clk_pllv3_sys_recalc_rate() argument
164 return parent_rate * div / 2; in clk_pllv3_sys_recalc_rate()
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| D | clk-pllv4.c | 75 unsigned long parent_rate) in clk_pllv4_recalc_rate() argument
87 temp64 = parent_rate; in clk_pllv4_recalc_rate()
91 return (parent_rate * mult) + (u32)temp64; in clk_pllv4_recalc_rate()
97 unsigned long parent_rate = *prate; in clk_pllv4_round_rate() local
104 round_rate = parent_rate * pllv4_mult_table[i]; in clk_pllv4_round_rate()
113 clk_hw_get_name(hw), rate, parent_rate); in clk_pllv4_round_rate()
117 if (parent_rate <= MAX_MFD) in clk_pllv4_round_rate()
118 mfd = parent_rate; in clk_pllv4_round_rate()
122 do_div(temp64, parent_rate); in clk_pllv4_round_rate()
134 temp64 = (u64)parent_rate; in clk_pllv4_round_rate()
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| D | clk-frac-pll.c | 97 unsigned long parent_rate) in clk_pll_recalc_rate() argument
101 u64 temp64 = parent_rate; in clk_pll_recalc_rate()
115 rate = parent_rate * 8 * (divfi + 1); in clk_pll_recalc_rate()
125 u64 parent_rate = *prate; in clk_pll_round_rate() local
129 parent_rate *= 8; in clk_pll_round_rate()
132 do_div(temp64, parent_rate); in clk_pll_round_rate()
134 temp64 = rate - divfi * parent_rate; in clk_pll_round_rate()
136 do_div(temp64, parent_rate); in clk_pll_round_rate()
139 temp64 = parent_rate; in clk_pll_round_rate()
143 rate = parent_rate * divfi + temp64; in clk_pll_round_rate()
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| /linux-5.19.10/drivers/clk/at91/ |
| D | clk-h32mx.c | 29 unsigned long parent_rate) in clk_sama5d4_h32mx_recalc_rate() argument
36 return parent_rate / 2; in clk_sama5d4_h32mx_recalc_rate()
38 if (parent_rate > H32MX_MAX_FREQ) in clk_sama5d4_h32mx_recalc_rate()
40 return parent_rate; in clk_sama5d4_h32mx_recalc_rate()
44 unsigned long *parent_rate) in clk_sama5d4_h32mx_round_rate() argument
48 if (rate > *parent_rate) in clk_sama5d4_h32mx_round_rate()
49 return *parent_rate; in clk_sama5d4_h32mx_round_rate()
50 div = *parent_rate / 2; in clk_sama5d4_h32mx_round_rate()
54 if (rate - div < *parent_rate - rate) in clk_sama5d4_h32mx_round_rate()
57 return *parent_rate; in clk_sama5d4_h32mx_round_rate()
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| D | clk-plldiv.c | 23 unsigned long parent_rate) in clk_plldiv_recalc_rate() argument
31 return parent_rate / 2; in clk_plldiv_recalc_rate()
33 return parent_rate; in clk_plldiv_recalc_rate()
37 unsigned long *parent_rate) in clk_plldiv_round_rate() argument
41 if (rate > *parent_rate) in clk_plldiv_round_rate()
42 return *parent_rate; in clk_plldiv_round_rate()
43 div = *parent_rate / 2; in clk_plldiv_round_rate()
47 if (rate - div < *parent_rate - rate) in clk_plldiv_round_rate()
50 return *parent_rate; in clk_plldiv_round_rate()
54 unsigned long parent_rate) in clk_plldiv_set_rate() argument
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| D | clk-smd.c | 27 unsigned long parent_rate) in at91sam9x5_clk_smd_recalc_rate() argument
36 return parent_rate / (smddiv + 1); in at91sam9x5_clk_smd_recalc_rate()
40 unsigned long *parent_rate) in at91sam9x5_clk_smd_round_rate() argument
46 if (rate >= *parent_rate) in at91sam9x5_clk_smd_round_rate()
47 return *parent_rate; in at91sam9x5_clk_smd_round_rate()
49 div = *parent_rate / rate; in at91sam9x5_clk_smd_round_rate()
51 return *parent_rate / (SMD_MAX_DIV + 1); in at91sam9x5_clk_smd_round_rate()
53 bestrate = *parent_rate / div; in at91sam9x5_clk_smd_round_rate()
54 tmp = *parent_rate / (div + 1); in at91sam9x5_clk_smd_round_rate()
85 unsigned long parent_rate) in at91sam9x5_clk_smd_set_rate() argument
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| D | clk-audio-pll.c | 159 static unsigned long clk_audio_pll_fout(unsigned long parent_rate, in clk_audio_pll_fout() argument
162 unsigned long long fr = (unsigned long long)parent_rate * fracr; in clk_audio_pll_fout()
170 return parent_rate * (nd + 1) + fr; in clk_audio_pll_fout()
174 unsigned long parent_rate) in clk_audio_pll_frac_recalc_rate() argument
179 fout = clk_audio_pll_fout(parent_rate, frac->nd, frac->fracr); in clk_audio_pll_frac_recalc_rate()
188 unsigned long parent_rate) in clk_audio_pll_pad_recalc_rate() argument
194 apad_rate = parent_rate / (apad_ck->qdaudio * apad_ck->div); in clk_audio_pll_pad_recalc_rate()
203 unsigned long parent_rate) in clk_audio_pll_pmc_recalc_rate() argument
208 apmc_rate = parent_rate / (apmc_ck->qdpmc + 1); in clk_audio_pll_pmc_recalc_rate()
217 unsigned long parent_rate, in clk_audio_pll_frac_compute_frac() argument
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| D | clk-utmi.c | 47 unsigned long parent_rate; in clk_utmi_prepare() local
55 parent_rate = clk_hw_get_rate(hw_parent); in clk_utmi_prepare()
57 switch (parent_rate) { in clk_utmi_prepare()
111 unsigned long parent_rate) in clk_utmi_recalc_rate() argument
190 unsigned long parent_rate; in clk_utmi_sama7g5_prepare() local
194 parent_rate = clk_hw_get_rate(hw_parent); in clk_utmi_sama7g5_prepare()
196 switch (parent_rate) { in clk_utmi_sama7g5_prepare()
224 unsigned long parent_rate; in clk_utmi_sama7g5_is_prepared() local
228 parent_rate = clk_hw_get_rate(hw_parent); in clk_utmi_sama7g5_is_prepared()
233 if (parent_rate == 16000000) in clk_utmi_sama7g5_is_prepared()
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| /linux-5.19.10/drivers/clk/actions/ |
| D | owl-factor.c | 44 unsigned long rate, unsigned long parent_rate) in _get_table_val() argument
51 calc_rate = parent_rate * clkt->mul; in _get_table_val()
71 unsigned long parent_rate, try_parent_rate, best = 0, cur_rate; in owl_clk_val_best() local
79 parent_rate = *best_parent_rate; in owl_clk_val_best()
80 bestval = _get_table_val(clkt, rate, parent_rate); in owl_clk_val_best()
100 parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), in owl_clk_val_best()
102 cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul; in owl_clk_val_best()
106 *best_parent_rate = parent_rate; in owl_clk_val_best()
122 unsigned long *parent_rate) in owl_factor_helper_round_rate() argument
127 val = owl_clk_val_best(factor_hw, &common->hw, rate, parent_rate); in owl_factor_helper_round_rate()
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| D | owl-composite.c | 57 unsigned long *parent_rate) in owl_comp_div_round_rate() argument
62 rate, parent_rate); in owl_comp_div_round_rate()
66 unsigned long parent_rate) in owl_comp_div_recalc_rate() argument
71 parent_rate); in owl_comp_div_recalc_rate()
75 unsigned long parent_rate) in owl_comp_div_set_rate() argument
80 rate, parent_rate); in owl_comp_div_set_rate()
84 unsigned long *parent_rate) in owl_comp_fact_round_rate() argument
90 rate, parent_rate); in owl_comp_fact_round_rate()
94 unsigned long parent_rate) in owl_comp_fact_recalc_rate() argument
100 parent_rate); in owl_comp_fact_recalc_rate()
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| D | owl-divider.c | 19 unsigned long *parent_rate) in owl_divider_helper_round_rate() argument
21 return divider_round_rate(&common->hw, rate, parent_rate, in owl_divider_helper_round_rate()
27 unsigned long *parent_rate) in owl_divider_round_rate() argument
32 rate, parent_rate); in owl_divider_round_rate()
37 unsigned long parent_rate) in owl_divider_helper_recalc_rate() argument
46 return divider_recalc_rate(&common->hw, parent_rate, in owl_divider_helper_recalc_rate()
53 unsigned long parent_rate) in owl_divider_recalc_rate() argument
58 &div->div_hw, parent_rate); in owl_divider_recalc_rate()
64 unsigned long parent_rate) in owl_divider_helper_set_rate() argument
69 val = divider_get_val(rate, parent_rate, div_hw->table, in owl_divider_helper_set_rate()
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| /linux-5.19.10/drivers/clk/analogbits/ |
| D | wrpll-cln28hpc.c | 188 unsigned long parent_rate) in __wrpll_update_parent_rate() argument
192 if (parent_rate > MAX_INPUT_FREQ || parent_rate < MIN_POST_DIVR_FREQ) in __wrpll_update_parent_rate()
195 c->parent_rate = parent_rate; in __wrpll_update_parent_rate()
196 max_r_for_parent = div_u64(parent_rate, MIN_POST_DIVR_FREQ); in __wrpll_update_parent_rate()
199 c->init_r = DIV_ROUND_UP_ULL(parent_rate, MAX_POST_DIVR_FREQ); in __wrpll_update_parent_rate()
226 unsigned long parent_rate) in wrpll_configure_for_rate() argument
240 if (parent_rate != c->parent_rate) { in wrpll_configure_for_rate()
241 if (__wrpll_update_parent_rate(c, parent_rate)) { in wrpll_configure_for_rate()
251 if (target_rate == parent_rate) { in wrpll_configure_for_rate()
265 ratio = div64_u64((target_vco_rate << ROUND_SHIFT), parent_rate); in wrpll_configure_for_rate()
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| /linux-5.19.10/drivers/clk/sprd/ |
| D | div.c | 15 unsigned long *parent_rate) in sprd_div_helper_round_rate() argument
17 return divider_round_rate(&common->hw, rate, parent_rate, in sprd_div_helper_round_rate()
23 unsigned long *parent_rate) in sprd_div_round_rate() argument
28 rate, parent_rate); in sprd_div_round_rate()
33 unsigned long parent_rate) in sprd_div_helper_recalc_rate() argument
42 return divider_recalc_rate(&common->hw, parent_rate, val, NULL, 0, in sprd_div_helper_recalc_rate()
48 unsigned long parent_rate) in sprd_div_recalc_rate() argument
52 return sprd_div_helper_recalc_rate(&cd->common, &cd->div, parent_rate); in sprd_div_recalc_rate()
58 unsigned long parent_rate) in sprd_div_helper_set_rate() argument
63 val = divider_get_val(rate, parent_rate, NULL, in sprd_div_helper_set_rate()
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| /linux-5.19.10/drivers/clk/meson/ |
| D | clk-pll.c | 55 static unsigned long __pll_params_to_rate(unsigned long parent_rate, in __pll_params_to_rate() argument
60 u64 rate = (u64)parent_rate * m; in __pll_params_to_rate()
63 u64 frac_rate = (u64)parent_rate * frac; in __pll_params_to_rate()
73 unsigned long parent_rate) in meson_clk_pll_recalc_rate() argument
95 return __pll_params_to_rate(parent_rate, m, n, frac, pll); in meson_clk_pll_recalc_rate()
99 unsigned long parent_rate, in __pll_params_with_frac() argument
108 if (rate < parent_rate * m / n) in __pll_params_with_frac()
112 val = DIV_ROUND_CLOSEST_ULL(val * frac_max, parent_rate); in __pll_params_with_frac()
114 val = div_u64(val * frac_max, parent_rate); in __pll_params_with_frac()
154 unsigned long parent_rate, in meson_clk_get_pll_range_m() argument
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| D | clk-dualdiv.c | 37 __dualdiv_param_to_rate(unsigned long parent_rate, in __dualdiv_param_to_rate() argument
41 return DIV_ROUND_CLOSEST(parent_rate, p->n1); in __dualdiv_param_to_rate()
43 return DIV_ROUND_CLOSEST(parent_rate * (p->m1 + p->m2), in __dualdiv_param_to_rate()
48 unsigned long parent_rate) in meson_clk_dualdiv_recalc_rate() argument
60 return __dualdiv_param_to_rate(parent_rate, &setting); in meson_clk_dualdiv_recalc_rate()
64 __dualdiv_get_setting(unsigned long rate, unsigned long parent_rate, in __dualdiv_get_setting() argument
75 now = __dualdiv_param_to_rate(parent_rate, &table[i]); in __dualdiv_get_setting()
90 unsigned long *parent_rate) in meson_clk_dualdiv_round_rate() argument
95 __dualdiv_get_setting(rate, *parent_rate, dualdiv); in meson_clk_dualdiv_round_rate()
98 return meson_clk_dualdiv_recalc_rate(hw, *parent_rate); in meson_clk_dualdiv_round_rate()
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| /linux-5.19.10/drivers/clk/ |
| D | clk-multiplier.c | 33 unsigned long parent_rate) in __get_mult() argument
36 return DIV_ROUND_CLOSEST(rate, parent_rate); in __get_mult()
38 return rate / parent_rate; in __get_mult()
42 unsigned long parent_rate) in clk_multiplier_recalc_rate() argument
53 return parent_rate * val; in clk_multiplier_recalc_rate()
71 unsigned long parent_rate, current_rate, best_rate = ~0; in __bestmult() local
101 parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), in __bestmult()
103 current_rate = parent_rate * i; in __bestmult()
108 *best_parent_rate = parent_rate; in __bestmult()
116 unsigned long *parent_rate) in clk_multiplier_round_rate() argument
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| D | clk-vt8500.c | 115 unsigned long parent_rate) in vt8500_dclk_recalc_rate() argument
128 return parent_rate / div; in vt8500_dclk_recalc_rate()
158 unsigned long parent_rate) in vt8500_dclk_set_rate() argument
167 divisor = parent_rate / rate; in vt8500_dclk_set_rate()
350 static int vt8500_find_pll_bits(unsigned long rate, unsigned long parent_rate, in vt8500_find_pll_bits() argument
356 if ((rate < parent_rate * 4) || (rate > parent_rate * 62)) { in vt8500_find_pll_bits()
362 if (rate <= parent_rate * 31) in vt8500_find_pll_bits()
368 *multiplier = rate / (parent_rate / *prediv); in vt8500_find_pll_bits()
369 tclk = (parent_rate / *prediv) * *multiplier; in vt8500_find_pll_bits()
390 unsigned long parent_rate, u32 *multiplier, u32 *divisor1, in wm8650_find_pll_bits() argument
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| D | clk-cdce925.c | 92 static unsigned long cdce925_pll_calculate_rate(unsigned long parent_rate, in cdce925_pll_calculate_rate() argument
96 return parent_rate; /* In bypass mode runs at same frequency */ in cdce925_pll_calculate_rate()
97 return mult_frac(parent_rate, (unsigned long)n, (unsigned long)m); in cdce925_pll_calculate_rate()
101 unsigned long parent_rate) in cdce925_pll_recalc_rate() argument
106 return cdce925_pll_calculate_rate(parent_rate, data->n, data->m); in cdce925_pll_recalc_rate()
110 unsigned long parent_rate, u16 *n, u16 *m) in cdce925_pll_find_rate() argument
116 if (rate <= parent_rate) { in cdce925_pll_find_rate()
118 rate = parent_rate; in cdce925_pll_find_rate()
128 g = gcd(rate, parent_rate); in cdce925_pll_find_rate()
129 um = parent_rate / g; in cdce925_pll_find_rate()
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| D | clk-sparx5.c | 58 static unsigned long s5_calc_freq(unsigned long parent_rate, in s5_calc_freq() argument
61 unsigned long rate = parent_rate / conf->div; in s5_calc_freq()
76 unsigned long parent_rate, in s5_search_fractional() argument
94 conf->freq = s5_calc_freq(parent_rate, conf); in s5_search_fractional()
109 unsigned long parent_rate, in s5_calc_params() argument
112 if (parent_rate % rate) { in s5_calc_params()
116 div = DIV_ROUND_CLOSEST_ULL(parent_rate, rate); in s5_calc_params()
117 s5_search_fractional(rate, parent_rate, div, &alt1); in s5_calc_params()
124 div = parent_rate / rate; in s5_calc_params()
126 s5_search_fractional(rate, parent_rate, div, in s5_calc_params()
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| D | clk-highbank.c | 94 unsigned long parent_rate) in clk_pll_recalc_rate() argument
101 return parent_rate; in clk_pll_recalc_rate()
105 vco_freq = parent_rate * (divf + 1); in clk_pll_recalc_rate()
135 unsigned long *parent_rate) in clk_pll_round_rate() argument
138 unsigned long ref_freq = *parent_rate; in clk_pll_round_rate()
146 unsigned long parent_rate) in clk_pll_set_rate() argument
152 clk_pll_calc(rate, parent_rate, &divq, &divf); in clk_pll_set_rate()
194 unsigned long parent_rate) in clk_cpu_periphclk_recalc_rate() argument
198 return parent_rate / div; in clk_cpu_periphclk_recalc_rate()
206 unsigned long parent_rate) in clk_cpu_a9bclk_recalc_rate() argument
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| /linux-5.19.10/drivers/clk/sunxi/ |
| D | clk-sun9i-cpus.c | 53 unsigned long parent_rate) in sun9i_a80_cpus_clk_recalc_rate() argument
64 parent_rate /= SUN9I_CPUS_PLL4_DIV_GET(reg) + 1; in sun9i_a80_cpus_clk_recalc_rate()
67 rate = parent_rate / (SUN9I_CPUS_DIV_GET(reg) + 1); in sun9i_a80_cpus_clk_recalc_rate()
73 u8 parent, unsigned long parent_rate) in sun9i_a80_cpus_clk_round() argument
81 if (parent_rate && rate > parent_rate) in sun9i_a80_cpus_clk_round()
82 rate = parent_rate; in sun9i_a80_cpus_clk_round()
84 div = DIV_ROUND_UP(parent_rate, rate); in sun9i_a80_cpus_clk_round()
110 return parent_rate / pre_div / div; in sun9i_a80_cpus_clk_round()
118 unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0; in sun9i_a80_cpus_clk_determine_rate() local
128 parent_rate = clk_hw_round_rate(parent, rate); in sun9i_a80_cpus_clk_determine_rate()
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| D | clk-sun9i-core.c | 103 if (req->parent_rate < req->rate) in sun9i_a80_get_gt_factors()
104 req->rate = req->parent_rate; in sun9i_a80_get_gt_factors()
106 div = DIV_ROUND_UP(req->parent_rate, req->rate); in sun9i_a80_get_gt_factors()
112 req->rate = req->parent_rate / div; in sun9i_a80_get_gt_factors()
158 if (req->parent_rate < req->rate) in sun9i_a80_get_ahb_factors()
159 req->rate = req->parent_rate; in sun9i_a80_get_ahb_factors()
161 _p = order_base_2(DIV_ROUND_UP(req->parent_rate, req->rate)); in sun9i_a80_get_ahb_factors()
167 req->rate = req->parent_rate >> _p; in sun9i_a80_get_ahb_factors()
238 if (req->parent_rate < req->rate) in sun9i_a80_get_apb1_factors()
239 req->rate = req->parent_rate; in sun9i_a80_get_apb1_factors()
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| /linux-5.19.10/drivers/clk/microchip/ |
| D | clk-core.c | 120 unsigned long parent_rate, in calc_best_divided_rate() argument
131 div = parent_rate / rate; in calc_best_divided_rate()
135 divided_rate = parent_rate / div; in calc_best_divided_rate()
136 divided_rate_down = parent_rate / div_up; in calc_best_divided_rate()
151 unsigned long parent_rate) in pbclk_recalc_rate() argument
155 return parent_rate / pbclk_read_pbdiv(pb); in pbclk_recalc_rate()
159 unsigned long *parent_rate) in pbclk_round_rate() argument
161 return calc_best_divided_rate(rate, *parent_rate, in pbclk_round_rate()
166 unsigned long parent_rate) in pbclk_set_rate() argument
180 div = DIV_ROUND_CLOSEST(parent_rate, rate); in pbclk_set_rate()
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| /linux-5.19.10/drivers/clk/sunxi-ng/ |
| D | ccu_mp.c | 47 unsigned long parent_rate, now; in ccu_mp_find_best_with_parent_adj() local
79 parent_rate = clk_hw_round_rate(hw, rate * div); in ccu_mp_find_best_with_parent_adj()
80 now = parent_rate / div; in ccu_mp_find_best_with_parent_adj()
84 *parent = parent_rate; in ccu_mp_find_best_with_parent_adj()
97 unsigned long *parent_rate, in ccu_mp_round_rate() argument
112 ccu_mp_find_best(*parent_rate, rate, max_m, max_p, &m, &p); in ccu_mp_round_rate()
113 rate = *parent_rate / p / m; in ccu_mp_round_rate()
115 rate = ccu_mp_find_best_with_parent_adj(hw, parent_rate, rate, in ccu_mp_round_rate()
147 unsigned long parent_rate) in ccu_mp_recalc_rate() argument
155 parent_rate = ccu_mux_helper_apply_prediv(&cmp->common, &cmp->mux, -1, in ccu_mp_recalc_rate()
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| /linux-5.19.10/drivers/clk/bcm/ |
| D | clk-iproc-asiu.c | 79 unsigned long parent_rate) in iproc_asiu_clk_recalc_rate() argument
86 if (parent_rate == 0) { in iproc_asiu_clk_recalc_rate()
94 clk->rate = parent_rate; in iproc_asiu_clk_recalc_rate()
95 return parent_rate; in iproc_asiu_clk_recalc_rate()
104 clk->rate = parent_rate / (div_h + div_l); in iproc_asiu_clk_recalc_rate()
106 __func__, clk->rate, parent_rate, div_h, div_l); in iproc_asiu_clk_recalc_rate()
112 unsigned long *parent_rate) in iproc_asiu_clk_round_rate() argument
116 if (rate == 0 || *parent_rate == 0) in iproc_asiu_clk_round_rate()
119 if (rate == *parent_rate) in iproc_asiu_clk_round_rate()
120 return *parent_rate; in iproc_asiu_clk_round_rate()
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