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Searched refs:nvkm_debug (Results 1 – 25 of 77) sorted by relevance

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/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/nvfw/
Dflcn.c28 nvkm_debug(subdev, "loaderConfig\n"); in loader_config_dump()
29 nvkm_debug(subdev, "\tdmaIdx : %d\n", hdr->dma_idx); in loader_config_dump()
30 nvkm_debug(subdev, "\tcodeDmaBase : 0x%xx\n", hdr->code_dma_base); in loader_config_dump()
31 nvkm_debug(subdev, "\tcodeSizeTotal : 0x%x\n", hdr->code_size_total); in loader_config_dump()
32 nvkm_debug(subdev, "\tcodeSizeToLoad: 0x%x\n", hdr->code_size_to_load); in loader_config_dump()
33 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point); in loader_config_dump()
34 nvkm_debug(subdev, "\tdataDmaBase : 0x%x\n", hdr->data_dma_base); in loader_config_dump()
35 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size); in loader_config_dump()
36 nvkm_debug(subdev, "\toverlayDmaBase: 0x%x\n", hdr->overlay_dma_base); in loader_config_dump()
37 nvkm_debug(subdev, "\targc : 0x%08x\n", hdr->argc); in loader_config_dump()
[all …]
Dacr.c28 nvkm_debug(subdev, "wprHeader\n"); in wpr_header_dump()
29 nvkm_debug(subdev, "\tfalconID : %d\n", hdr->falcon_id); in wpr_header_dump()
30 nvkm_debug(subdev, "\tlsbOffset : 0x%x\n", hdr->lsb_offset); in wpr_header_dump()
31 nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner); in wpr_header_dump()
32 nvkm_debug(subdev, "\tlazyBootstrap : %d\n", hdr->lazy_bootstrap); in wpr_header_dump()
33 nvkm_debug(subdev, "\tstatus : %d\n", hdr->status); in wpr_header_dump()
39 nvkm_debug(subdev, "wprHeader\n"); in wpr_header_v1_dump()
40 nvkm_debug(subdev, "\tfalconID : %d\n", hdr->falcon_id); in wpr_header_v1_dump()
41 nvkm_debug(subdev, "\tlsbOffset : 0x%x\n", hdr->lsb_offset); in wpr_header_v1_dump()
42 nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner); in wpr_header_v1_dump()
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Dls.c31 nvkm_debug(subdev, "lsUcodeImgDesc:\n"); in nvfw_ls_desc_head()
32 nvkm_debug(subdev, "\tdescriptorSize : %d\n", in nvfw_ls_desc_head()
34 nvkm_debug(subdev, "\timageSize : %d\n", hdr->image_size); in nvfw_ls_desc_head()
35 nvkm_debug(subdev, "\ttoolsVersion : 0x%x\n", in nvfw_ls_desc_head()
37 nvkm_debug(subdev, "\tappVersion : 0x%x\n", hdr->app_version); in nvfw_ls_desc_head()
40 nvkm_debug(subdev, "\tdate : %s\n", date); in nvfw_ls_desc_head()
43 nvkm_debug(subdev, "\tbootloaderStartOffset: 0x%x\n", in nvfw_ls_desc_head()
45 nvkm_debug(subdev, "\tbootloaderSize : 0x%x\n", in nvfw_ls_desc_head()
47 nvkm_debug(subdev, "\tbootloaderImemOffset : 0x%x\n", in nvfw_ls_desc_head()
49 nvkm_debug(subdev, "\tbootloaderEntryPoint : 0x%x\n", in nvfw_ls_desc_head()
[all …]
Dhs.c29 nvkm_debug(subdev, "hsHeader:\n"); in nvfw_hs_header()
30 nvkm_debug(subdev, "\tsigDbgOffset : 0x%x\n", hdr->sig_dbg_offset); in nvfw_hs_header()
31 nvkm_debug(subdev, "\tsigDbgSize : 0x%x\n", hdr->sig_dbg_size); in nvfw_hs_header()
32 nvkm_debug(subdev, "\tsigProdOffset : 0x%x\n", hdr->sig_prod_offset); in nvfw_hs_header()
33 nvkm_debug(subdev, "\tsigProdSize : 0x%x\n", hdr->sig_prod_size); in nvfw_hs_header()
34 nvkm_debug(subdev, "\tpatchLoc : 0x%x\n", hdr->patch_loc); in nvfw_hs_header()
35 nvkm_debug(subdev, "\tpatchSig : 0x%x\n", hdr->patch_sig); in nvfw_hs_header()
36 nvkm_debug(subdev, "\thdrOffset : 0x%x\n", hdr->hdr_offset); in nvfw_hs_header()
37 nvkm_debug(subdev, "\thdrSize : 0x%x\n", hdr->hdr_size); in nvfw_hs_header()
47 nvkm_debug(subdev, "hsLoadHeader:\n"); in nvfw_hs_load_header()
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Dfw.c29 nvkm_debug(subdev, "binHdr:\n"); in nvfw_bin_hdr()
30 nvkm_debug(subdev, "\tbinMagic : 0x%08x\n", hdr->bin_magic); in nvfw_bin_hdr()
31 nvkm_debug(subdev, "\tbinVer : %d\n", hdr->bin_ver); in nvfw_bin_hdr()
32 nvkm_debug(subdev, "\tbinSize : %d\n", hdr->bin_size); in nvfw_bin_hdr()
33 nvkm_debug(subdev, "\theaderOffset : 0x%x\n", hdr->header_offset); in nvfw_bin_hdr()
34 nvkm_debug(subdev, "\tdataOffset : 0x%x\n", hdr->data_offset); in nvfw_bin_hdr()
35 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size); in nvfw_bin_hdr()
43 nvkm_debug(subdev, "blDesc\n"); in nvfw_bl_desc()
44 nvkm_debug(subdev, "\tstartTag : 0x%x\n", hdr->start_tag); in nvfw_bl_desc()
45 nvkm_debug(subdev, "\tdmemLoadOff : 0x%x\n", hdr->dmem_load_off); in nvfw_bl_desc()
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/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/
Dbase.c109 nvkm_debug(subdev, "DSM MXMS failed\n"); in mxm_shadow_dsm()
117 nvkm_debug(subdev, "DSM MXMS returned 0x%llx\n", in mxm_shadow_dsm()
142 nvkm_debug(subdev, "WMMX MXMI returned %d\n", status); in wmi_wmmx_mxmi()
149 nvkm_debug(subdev, "WMMX MXMI version %d.%d\n", in wmi_wmmx_mxmi()
153 nvkm_debug(subdev, "WMMX MXMI returned non-integer\n"); in wmi_wmmx_mxmi()
171 nvkm_debug(subdev, "WMMX GUID not found\n"); in mxm_shadow_wmi()
183 nvkm_debug(subdev, "WMMX MXMS returned %d\n", status); in mxm_shadow_wmi()
217 nvkm_debug(&mxm->subdev, "checking %s\n", shadow->name); in mxm_shadow()
248 nvkm_debug(&mxm->subdev, "no VBIOS data, nothing to do\n"); in nvkm_mxm_new_()
253 nvkm_debug(&mxm->subdev, "module flags: %02x\n", in nvkm_mxm_new_()
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Dmxms.c50 nvkm_debug(&mxm->subdev, "unknown version %d.%d\n", mxms[4], mxms[5]); in mxms_version()
74 nvkm_debug(&mxm->subdev, "checksum invalid\n"); in mxms_checksum()
85 nvkm_debug(&mxm->subdev, "signature invalid\n"); in mxms_valid()
144 nvkm_debug(subdev, "unknown descriptor type %d\n", type); in mxms_foreach()
161 nvkm_debug(subdev, "%4s: %s\n", mxms_desc[type], data); in mxms_foreach()
165 nvkm_debug(subdev, " %s\n", data); in mxms_foreach()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/timer/
Dnv41.c60 nvkm_debug(subdev, "input frequency : %dHz\n", f); in nv41_timer_init()
61 nvkm_debug(subdev, "input multiplier: %d\n", m); in nv41_timer_init()
62 nvkm_debug(subdev, "numerator : %08x\n", n); in nv41_timer_init()
63 nvkm_debug(subdev, "denominator : %08x\n", d); in nv41_timer_init()
64 nvkm_debug(subdev, "timer frequency : %dHz\n", (f * m) * d / n); in nv41_timer_init()
Dnv04.c35 nvkm_debug(subdev, "time low : %08x\n", lo); in nv04_timer_time()
36 nvkm_debug(subdev, "time high : %08x\n", hi); in nv04_timer_time()
128 nvkm_debug(subdev, "input frequency : %dHz\n", f); in nv04_timer_init()
129 nvkm_debug(subdev, "numerator : %08x\n", n); in nv04_timer_init()
130 nvkm_debug(subdev, "denominator : %08x\n", d); in nv04_timer_init()
131 nvkm_debug(subdev, "timer frequency : %dHz\n", f * d / n); in nv04_timer_init()
Dnv40.c65 nvkm_debug(subdev, "input frequency : %dHz\n", f); in nv40_timer_init()
66 nvkm_debug(subdev, "numerator : %08x\n", n); in nv40_timer_init()
67 nvkm_debug(subdev, "denominator : %08x\n", d); in nv40_timer_init()
68 nvkm_debug(subdev, "timer frequency : %dHz\n", f * d / n); in nv40_timer_init()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dmemx.c91 nvkm_debug(subdev, "Exec took %uns, PMU_IN %08x\n", in nvkm_memx_fini()
102 nvkm_debug(&memx->pmu->subdev, "R[%06x] = %08x\n", addr, data); in nvkm_memx_wr32()
110 nvkm_debug(&memx->pmu->subdev, "R[%06x] & %08x == %08x, %d us\n", in nvkm_memx_wait()
119 nvkm_debug(&memx->pmu->subdev, " DELAY = %d ns\n", nsec); in nvkm_memx_nsec()
149 nvkm_debug(subdev, "WAIT VBLANK !NO ACTIVE HEAD\n"); in nvkm_memx_wait_vblank()
153 nvkm_debug(subdev, "WAIT VBLANK HEAD%d\n", head_sync); in nvkm_memx_wait_vblank()
161 nvkm_debug(&memx->pmu->subdev, " MEM TRAIN\n"); in nvkm_memx_train()
194 nvkm_debug(&memx->pmu->subdev, " HOST BLOCKED\n"); in nvkm_memx_block()
201 nvkm_debug(&memx->pmu->subdev, " HOST UNBLOCKED\n"); in nvkm_memx_unblock()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Dshadow.c65 nvkm_debug(subdev, "%08x: header fetch failed\n", in shadow_image()
71 nvkm_debug(subdev, "image %d invalid\n", idx); in shadow_image()
75 nvkm_debug(subdev, "%08x: type %02x, %d bytes\n", in shadow_image()
79 nvkm_debug(subdev, "%08x: fetch failed\n", image.base); in shadow_image()
87 nvkm_debug(subdev, "%08x: checksum failed\n", in shadow_image()
115 nvkm_debug(subdev, "trying %s...\n", name ? name : func->name); in shadow_method()
126 nvkm_debug(subdev, "scored %d\n", mthd->score); in shadow_method()
236 nvkm_debug(subdev, "using image from %s\n", best->func ? in nvbios_shadow()
Dshadowramin.c76 nvkm_debug(subdev, "... display disabled\n"); in pramin_init()
89 nvkm_debug(subdev, "... not enabled\n"); in pramin_init()
93 nvkm_debug(subdev, "... not in vram\n"); in pramin_init()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dmcp77.c157 nvkm_debug(subdev, "unknown clock source %d %08x\n", src, mast); in mcp77_clk_read()
270 nvkm_debug(subdev, "nvpll: %08x %08x %08x\n", in mcp77_clk_calc()
272 nvkm_debug(subdev, " spll: %08x %08x %08x\n", in mcp77_clk_calc()
274 nvkm_debug(subdev, " vdiv: %08x\n", clk->vdiv); in mcp77_clk_calc()
276 nvkm_debug(subdev, "core: hrefm4\n"); in mcp77_clk_calc()
278 nvkm_debug(subdev, "core: nvpll\n"); in mcp77_clk_calc()
281 nvkm_debug(subdev, "shader: hrefm4\n"); in mcp77_clk_calc()
283 nvkm_debug(subdev, "shader: nvpll\n"); in mcp77_clk_calc()
285 nvkm_debug(subdev, "shader: spll\n"); in mcp77_clk_calc()
288 nvkm_debug(subdev, "vdec: 500MHz\n"); in mcp77_clk_calc()
[all …]
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/bus/
Dhwsq.c93 nvkm_debug(hwsq->subdev, "R[%06x] = %08x\n", addr, data); in nvkm_hwsq_wr32()
118 nvkm_debug(hwsq->subdev, " FLAG[%02x] = %d\n", flag, data); in nvkm_hwsq_setf()
130 nvkm_debug(hwsq->subdev, " WAIT[%02x] = %d\n", flag, data); in nvkm_hwsq_wait()
157 nvkm_debug(subdev, "WAIT VBLANK !NO ACTIVE HEAD\n"); in nvkm_hwsq_wait_vblank()
161 nvkm_debug(subdev, "WAIT VBLANK HEAD%d\n", head_sync); in nvkm_hwsq_wait_vblank()
175 nvkm_debug(hwsq->subdev, " DELAY = %d ns\n", nsec); in nvkm_hwsq_nsec()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/volt/
Dbase.c76 nvkm_debug(subdev, "set req %duv to %duv: %d\n", uv, in nvkm_volt_set()
197 nvkm_debug(subdev, "found ranged based VIDs\n"); in nvkm_volt_parse_bios()
211 nvkm_debug(subdev, "found entry based VIDs\n"); in nvkm_volt_parse_bios()
247 nvkm_debug(subdev, "current voltage unknown\n"); in nvkm_volt_init()
250 nvkm_debug(subdev, "current voltage: %duv\n", ret); in nvkm_volt_init()
261 nvkm_debug(&volt->subdev, "speedo %x\n", volt->speedo); in nvkm_volt_oneinit()
298 nvkm_debug(&volt->subdev, "min: %iuv max: %iuv\n", in nvkm_volt_ctor()
314 nvkm_debug(&volt->subdev, "VID %02x: %duv\n", in nvkm_volt_ctor()
Dgk20a.c113 nvkm_debug(subdev, "set voltage as %duv\n", volt->base.vid[vid].uv); in gk20a_volt_vid_set()
126 nvkm_debug(subdev, "prev=%d, target=%d, condition=%d\n", in gk20a_volt_set_id()
157 nvkm_debug(&volt->base.subdev, "the default voltage is %duV\n", uv); in gk20a_volt_ctor()
167 nvkm_debug(&volt->base.subdev, "%2d: vid=%d, uv=%d\n", i, in gk20a_volt_ctor()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/pci/
Dpcie.c83 nvkm_debug(&pci->subdev, "pcie max speed: %s\n", in nvkm_pcie_oneinit()
143 nvkm_debug(subdev, "%s not supported by bus or card, dropping" in nvkm_pcie_set_link()
153 nvkm_debug(subdev, "requested matches current speed\n"); in nvkm_pcie_set_link()
157 nvkm_debug(subdev, "set link to %s x%i\n", in nvkm_pcie_set_link()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
Dfan.c48 nvkm_debug(subdev, "FAN target: %d\n", target); in nvkm_fan_update()
73 nvkm_debug(subdev, "FAN update: %d\n", duty); in nvkm_fan_update()
237 nvkm_debug(subdev, "GPIO_FAN is in input mode\n"); in nvkm_therm_fan_ctor()
253 nvkm_debug(subdev, "FAN control: %s\n", therm->fan->type); in nvkm_therm_fan_ctor()
273 nvkm_debug(subdev, "parsing the fan table failed\n"); in nvkm_therm_fan_ctor()
Dbase.c158 nvkm_debug(subdev, "FAN target request: %d%%\n", duty); in nvkm_therm_update()
169 nvkm_debug(subdev, "default fan speed -> %d%%\n", fan); in nvkm_therm_cstate()
209 nvkm_debug(subdev, "fan management: %s\n", name[mode]); in nvkm_therm_fan_mode()
309 nvkm_debug(&therm->subdev, in nvkm_therm_clkgate_enable()
320 nvkm_debug(&therm->subdev, in nvkm_therm_clkgate_fini()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/privring/
Dgf100.c34 nvkm_debug(privring, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat); in gf100_privring_intr_hub()
44 nvkm_debug(privring, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat); in gf100_privring_intr_rop()
54 nvkm_debug(privring, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat); in gf100_privring_intr_gpc()
Dgk104.c34 nvkm_debug(privring, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat); in gk104_privring_intr_hub()
44 nvkm_debug(privring, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat); in gk104_privring_intr_rop()
54 nvkm_debug(privring, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat); in gk104_privring_intr_gpc()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/acr/
Dbase.c50 nvkm_debug(subdev, "executing %s binary\n", hsf->name); in nvkm_acr_hsf_boot()
62 nvkm_debug(subdev, "%s binary completed successfully\n", hsf->name); in nvkm_acr_hsf_boot()
84 nvkm_debug(subdev, "No LSF(s) present.\n"); in nvkm_acr_load()
227 nvkm_debug(subdev, "No HSFW(s)\n"); in nvkm_acr_oneinit()
295 nvkm_debug(subdev, "WPR region is from 0x%llx-0x%llx (shadow 0x%llx)\n", in nvkm_acr_oneinit()
339 nvkm_debug(subdev, "loading %s fw\n", hsfw->name); in nvkm_acr_oneinit()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/engine/
Dfalcon.c82 nvkm_debug(subdev, "ucode halted\n"); in nvkm_falcon_intr()
152 nvkm_debug(subdev, "falcon version: %d\n", falcon->version); in nvkm_falcon_oneinit()
153 nvkm_debug(subdev, "secret level: %d\n", falcon->secret); in nvkm_falcon_oneinit()
154 nvkm_debug(subdev, "code limit: %d\n", falcon->code.limit); in nvkm_falcon_oneinit()
155 nvkm_debug(subdev, "data limit: %d\n", falcon->data.limit); in nvkm_falcon_oneinit()
243 nvkm_debug(subdev, "firmware: %s (%s)\n", name, falcon->data.data ? in nvkm_falcon_init()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/core/
Dfirmware.c93 nvkm_debug(subdev, "firmware \"%s\" loaded - %zu byte(s)\n", in nvkm_firmware_get()
98 nvkm_debug(subdev, "firmware \"%s\" unavailable\n", f); in nvkm_firmware_get()

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