/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
D | pll.c | 88 data = nvbios_rd16(bios, bit_C.offset + 8); in pll_limits_table() 101 data = nvbios_rd16(bios, bios->bmp_offset + 142); in pll_limits_table() 303 info->vco1.min_freq = nvbios_rd16(bios, data + 4) * 1000; in nvbios_pll_parse() 304 info->vco1.max_freq = nvbios_rd16(bios, data + 6) * 1000; in nvbios_pll_parse() 305 info->vco2.min_freq = nvbios_rd16(bios, data + 8) * 1000; in nvbios_pll_parse() 306 info->vco2.max_freq = nvbios_rd16(bios, data + 10) * 1000; in nvbios_pll_parse() 307 info->vco1.min_inputfreq = nvbios_rd16(bios, data + 12) * 1000; in nvbios_pll_parse() 308 info->vco2.min_inputfreq = nvbios_rd16(bios, data + 14) * 1000; in nvbios_pll_parse() 309 info->vco1.max_inputfreq = nvbios_rd16(bios, data + 16) * 1000; in nvbios_pll_parse() 310 info->vco2.max_inputfreq = nvbios_rd16(bios, data + 18) * 1000; in nvbios_pll_parse() [all …]
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D | dp.c | 35 u16 data = nvbios_rd16(bios, d.offset); in nvbios_dp_table() 65 u16 outp = nvbios_rd16(bios, data + *hdr + idx * *len); in nvbios_dpout_entry() 98 info->type = nvbios_rd16(bios, data + 0x00); in nvbios_dpout_parse() 99 info->mask = nvbios_rd16(bios, data + 0x02); in nvbios_dpout_parse() 107 info->script[0] = nvbios_rd16(bios, data + 0x06); in nvbios_dpout_parse() 108 info->script[1] = nvbios_rd16(bios, data + 0x08); in nvbios_dpout_parse() 110 info->lnkcmp = nvbios_rd16(bios, data + 0x0a); in nvbios_dpout_parse() 112 info->script[2] = nvbios_rd16(bios, data + 0x0c); in nvbios_dpout_parse() 113 info->script[3] = nvbios_rd16(bios, data + 0x0e); in nvbios_dpout_parse() 116 info->script[4] = nvbios_rd16(bios, data + 0x10); in nvbios_dpout_parse() [all …]
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D | perf.c | 62 perf = nvbios_rd16(bios, bios->bmp_offset + 0x94); in nvbios_perf_table() 116 info->shader = nvbios_rd16(bios, perf + 0x06) * 1000; in nvbios_perfEp() 122 info->memory = nvbios_rd16(bios, perf + 0x0b) * 1000; in nvbios_perfEp() 125 info->memory = nvbios_rd16(bios, perf + 0x0b) * 2000; in nvbios_perfEp() 132 info->core = nvbios_rd16(bios, perf + 0x06) * 1000; in nvbios_perfEp() 133 info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000; in nvbios_perfEp() 134 info->memory = nvbios_rd16(bios, perf + 0x0c) * 1000; in nvbios_perfEp() 137 info->script = nvbios_rd16(bios, perf + 0x02); in nvbios_perfEp() 142 info->core = nvbios_rd16(bios, perf + 0x08) * 1000; in nvbios_perfEp() 143 info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000; in nvbios_perfEp() [all …]
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D | pcir.c | 30 u32 data = nvbios_rd16(bios, base + 0x18); in nvbios_pcirTe() 37 *hdr = nvbios_rd16(bios, data + 0x0a); in nvbios_pcirTe() 58 info->vendor_id = nvbios_rd16(bios, data + 0x04); in nvbios_pcirTp() 59 info->device_id = nvbios_rd16(bios, data + 0x06); in nvbios_pcirTp() 63 info->image_size = nvbios_rd16(bios, data + 0x10) * 512; in nvbios_pcirTp() 64 info->image_rev = nvbios_rd16(bios, data + 0x12); in nvbios_pcirTp()
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D | disp.c | 36 u16 data = nvbios_rd16(bios, U.offset); in nvbios_disp_table() 75 info->data = nvbios_rd16(bios, data + 0); in nvbios_disp_parse() 101 info->type = nvbios_rd16(bios, data + 0x00); in nvbios_outp_parse() 105 info->script[0] = nvbios_rd16(bios, data + 0x06); in nvbios_outp_parse() 106 info->script[1] = nvbios_rd16(bios, data + 0x08); in nvbios_outp_parse() 109 info->script[2] = nvbios_rd16(bios, data + 0x0a); in nvbios_outp_parse() 145 info->flags = nvbios_rd16(bios, data + 0x01); in nvbios_ocfg_parse() 146 info->clkcmp[0] = nvbios_rd16(bios, data + 0x02); in nvbios_ocfg_parse() 147 info->clkcmp[1] = nvbios_rd16(bios, data + 0x04); in nvbios_ocfg_parse() 169 if (khz / 10 >= nvbios_rd16(bios, cmp + 0x00)) in nvbios_oclk_match() [all …]
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D | boost.c | 81 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5; in nvbios_boostEp() 82 info->min = nvbios_rd16(bios, data + 0x02) * 1000; in nvbios_boostEp() 83 info->max = nvbios_rd16(bios, data + 0x04) * 1000; in nvbios_boostEp() 122 info->min = nvbios_rd16(bios, data + 0x02) * 1000; in nvbios_boostSp() 123 info->max = nvbios_rd16(bios, data + 0x04) * 1000; in nvbios_boostSp()
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D | i2c.c | 35 i2c = nvbios_rd16(bios, dcb + 2); in dcb_i2c_table() 37 i2c = nvbios_rd16(bios, dcb + 4); in dcb_i2c_table() 119 info->drive = (nvbios_rd16(bios, ent + 0) & 0x01f) >> 0; in dcb_i2c_parse() 122 info->auxch = (nvbios_rd16(bios, ent + 0) & 0x3e0) >> 5; in dcb_i2c_parse()
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D | bit.c | 37 bit->length = nvbios_rd16(bios, entry + 2); in bit_entry() 38 bit->offset = nvbios_rd16(bios, entry + 4); in bit_entry()
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D | init.c | 383 data = nvbios_rd16(bios, data + offset); in init_table_() 419 return nvbios_rd16(bios, data + (index * 2)); in init_script() 424 return nvbios_rd16(bios, data + (index * 2)); in init_script() 434 return nvbios_rd16(bios, data + 14); in init_unknown_script() 466 u16 data = nvbios_rd16(bios, table + (index * 2)); in init_xlat_() 500 u16 port = nvbios_rd16(bios, table + (cond * 5) + 0); in init_io_condition_met() 517 u16 port = nvbios_rd16(bios, table + (cond * 9) + 0); in init_io_flag_condition_met() 521 u16 data = nvbios_rd16(bios, table + (cond * 9) + 5); in init_io_flag_condition_met() 624 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_prog() 687 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_pll() [all …]
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D | ramcfg.c | 62 xlat = nvbios_rd16(bios, bit_M.offset + 3); in nvbios_ramcfg_index() 71 xlat = nvbios_rd16(bios, bit_M.offset + 1); in nvbios_ramcfg_index()
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D | gpio.c | 36 data = nvbios_rd16(bios, dcb + 0x0a); in dcb_gpio_table() 39 data = nvbios_rd16(bios, dcb - 0x0f); in dcb_gpio_table() 84 u16 info = nvbios_rd16(bios, data); in dcb_gpio_parse()
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D | dcb.c | 35 dcb = nvbios_rd16(bios, 0x36); in dcb_table() 57 u16 i2c = nvbios_rd16(bios, dcb + 2); in dcb_table() 66 u16 i2c = nvbios_rd16(bios, dcb + 2); in dcb_table()
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D | xpio.c | 33 u16 xpio = nvbios_rd16(bios, data + 0x04); in dcb_xpiod_table() 51 u16 xpio = nvbios_rd16(bios, data + *hdr + (idx * *len)); in dcb_xpio_table()
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D | mxm.c | 81 u16 map = nvbios_rd16(bios, mxm + 4); in mxm_sor_map() 118 u16 map = nvbios_rd16(bios, mxm + 6); in mxm_ddc_map()
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D | M0203.c | 36 data = nvbios_rd16(bios, bit_M.offset + 0x03); in nvbios_M0203Te() 63 info->pointer = nvbios_rd16(bios, data + 0x05); in nvbios_M0203Tp()
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D | rammap.c | 100 p->rammap_min = nvbios_rd16(bios, data + 0x00); in nvbios_rammapEp() 101 p->rammap_max = nvbios_rd16(bios, data + 0x02); in nvbios_rammapEp() 106 p->rammap_min = nvbios_rd16(bios, data + 0x00); in nvbios_rammapEp() 107 p->rammap_max = nvbios_rd16(bios, data + 0x02); in nvbios_rammapEp()
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D | cstep.c | 78 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5; in nvbios_cstepEp() 116 info->freq = nvbios_rd16(bios, data + 0x00) * 1000; in nvbios_cstepXp()
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D | therm.c | 84 s16 value = nvbios_rd16(bios, entry + 1); in nvbios_therm_sensor_parse() 166 s16 value = nvbios_rd16(bios, entry + 1); in nvbios_therm_fan_parse()
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D | volt.c | 93 info->step = nvbios_rd16(bios, volt + 0x08); in nvbios_volt_parse() 115 info->step = nvbios_rd16(bios, volt + 0x16); in nvbios_volt_parse()
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D | npde.c | 55 info->image_size = nvbios_rd16(bios, data + 0x08) * 512; in nvbios_npdeTp()
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D | timing.c | 155 temp = nvbios_rd16(bios, data + 0x2c); in nvbios_timingEp() 160 temp = nvbios_rd16(bios, data + 0x31); in nvbios_timingEp()
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D | image.c | 39 switch ((data = nvbios_rd16(bios, image->base + 0x00))) { in nvbios_imagen()
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/linux-5.19.10/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
D | bmp.h | 19 return nvbios_rd16(bios, bios->bmp_offset + 24); in bmp_mem_init_table() 27 return nvbios_rd16(bios, bios->bmp_offset + 26); in bmp_sdr_seq_table() 35 return nvbios_rd16(bios, bios->bmp_offset + 28); in bmp_ddr_seq_table()
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/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
D | gm200.c | 144 u32 img = nvbios_rd16(bios, bit_I.offset + 0x14); in gm200_devinit_post() 145 u32 len = nvbios_rd16(bios, bit_I.offset + 0x16); in gm200_devinit_post() 152 u32 img = nvbios_rd16(bios, bit_I.offset + 0x18); in gm200_devinit_post() 153 u32 len = nvbios_rd16(bios, bit_I.offset + 0x1a); in gm200_devinit_post()
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/linux-5.19.10/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
D | bios.h | 30 u16 nvbios_rd16(struct nvkm_bios *, u32 addr);
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