Searched refs:num_uvd_inst (Results 1 – 8 of 8) sorted by relevance
372 adev->uvd.num_uvd_inst = UVD7_MAX_HW_INSTANCES_VEGA20; in uvd_v7_0_early_init()373 for (i = 0; i < adev->uvd.num_uvd_inst; i++) { in uvd_v7_0_early_init()384 adev->uvd.num_uvd_inst = 1; in uvd_v7_0_early_init()405 for (j = 0; j < adev->uvd.num_uvd_inst; j++) { in uvd_v7_0_sw_init()433 if (adev->uvd.num_uvd_inst == UVD7_MAX_HW_INSTANCES_VEGA20) { in uvd_v7_0_sw_init()442 for (j = 0; j < adev->uvd.num_uvd_inst; j++) { in uvd_v7_0_sw_init()503 for (j = 0; j < adev->uvd.num_uvd_inst; ++j) { in uvd_v7_0_sw_fini()533 for (j = 0; j < adev->uvd.num_uvd_inst; ++j) { in uvd_v7_0_hw_init()674 for (i = 0; i < adev->uvd.num_uvd_inst; ++i) { in uvd_v7_0_mc_resume()753 for (i = 0; i < adev->uvd.num_uvd_inst; ++i) { in uvd_v7_0_mmsch_start()[all …]
59 uint8_t num_uvd_inst; member
330 for (j = 0; j < adev->uvd.num_uvd_inst; j++) { in amdgpu_uvd_sw_init()382 for (j = 0; j < adev->uvd.num_uvd_inst; ++j) { in amdgpu_uvd_sw_fini()445 for (j = 0; j < adev->uvd.num_uvd_inst; ++j) { in amdgpu_uvd_suspend()481 for (i = 0; i < adev->uvd.num_uvd_inst; i++) { in amdgpu_uvd_resume()1275 for (i = 0; i < adev->uvd.num_uvd_inst; ++i) { in amdgpu_uvd_idle_work_handler()
537 adev->uvd.num_uvd_inst = 1; in uvd_v3_1_early_init()
96 adev->uvd.num_uvd_inst = 1; in uvd_v4_2_early_init()
94 adev->uvd.num_uvd_inst = 1; in uvd_v5_0_early_init()
389 for (i = 0; i < adev->uvd.num_uvd_inst; i++) { in amdgpu_hw_ip_info()409 for (i = 0; i < adev->uvd.num_uvd_inst; i++) { in amdgpu_hw_ip_info()
360 adev->uvd.num_uvd_inst = 1; in uvd_v6_0_early_init()