Home
last modified time | relevance | path

Searched refs:muxes (Results 1 – 25 of 41) sorted by relevance

12

/linux-5.19.10/drivers/dma/
Dlpc18xx-dmamux.c33 struct lpc18xx_dmamux *muxes; member
85 if (dmamux->muxes[mux].busy) { in lpc18xx_dmamux_reserve()
88 mux, mux, dmamux->muxes[mux].value); in lpc18xx_dmamux_reserve()
93 dmamux->muxes[mux].busy = true; in lpc18xx_dmamux_reserve()
94 dmamux->muxes[mux].value = dma_spec->args[1]; in lpc18xx_dmamux_reserve()
98 LPC18XX_DMAMUX_VAL(dmamux->muxes[mux].value, mux)); in lpc18xx_dmamux_reserve()
105 dmamux->muxes[mux].value, mux); in lpc18xx_dmamux_reserve()
107 return &dmamux->muxes[mux]; in lpc18xx_dmamux_reserve()
147 dmamux->muxes = devm_kcalloc(&pdev->dev, dmamux->dma_master_requests, in lpc18xx_dmamux_probe()
150 if (!dmamux->muxes) in lpc18xx_dmamux_probe()
/linux-5.19.10/Documentation/i2c/
Di2c-topology.rst2 I2C muxes and complex topologies
37 There are two variants of locking available to I2C muxes, they can be
38 mux-locked or parent-locked muxes. As is evident from below, it can be
42 In drivers/i2c/muxes/:
80 Mux-locked muxes
83 Mux-locked muxes does not lock the entire parent adapter during the
84 full select-transfer-deselect transaction, only the muxes on the parent
85 adapter are locked. Mux-locked muxes are mostly interesting if the
99 mux-locked muxes that are not siblings, when there are address
101 non-sibling muxes.
[all …]
Dindex.rst19 muxes/i2c-mux-gpio
/linux-5.19.10/drivers/clk/mvebu/
Dkirkwood.c256 struct clk **muxes; member
282 to_clk_mux(__clk_get_hw(ctrl->muxes[n])); in clk_muxing_get_src()
284 return ctrl->muxes[n]; in clk_muxing_get_src()
312 ctrl->muxes = kcalloc(ctrl->num_muxes, sizeof(struct clk *), in kirkwood_clk_muxing_setup()
314 if (WARN_ON(!ctrl->muxes)) in kirkwood_clk_muxing_setup()
318 ctrl->muxes[n] = clk_register_mux(NULL, desc[n].name, in kirkwood_clk_muxing_setup()
322 WARN_ON(IS_ERR(ctrl->muxes[n])); in kirkwood_clk_muxing_setup()
/linux-5.19.10/drivers/clk/mediatek/
Dclk-mux.c190 int mtk_clk_register_muxes(const struct mtk_mux *muxes, in mtk_clk_register_muxes() argument
206 const struct mtk_mux *mux = &muxes[i]; in mtk_clk_register_muxes()
229 const struct mtk_mux *mux = &muxes[i]; in mtk_clk_register_muxes()
242 void mtk_clk_unregister_muxes(const struct mtk_mux *muxes, int num, in mtk_clk_unregister_muxes() argument
251 const struct mtk_mux *mux = &muxes[i - 1]; in mtk_clk_unregister_muxes()
Dclk-mux.h84 int mtk_clk_register_muxes(const struct mtk_mux *muxes,
89 void mtk_clk_unregister_muxes(const struct mtk_mux *muxes, int num,
/linux-5.19.10/Documentation/devicetree/bindings/mux/
Dadi,adg792a.txt5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
53 * Three parallel muxes with one mux controller, useful e.g. if
/linux-5.19.10/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,mt8186-sys-clock.yaml16 muxes
21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks.
Dmediatek,mt8195-sys-clock.yaml16 muxes
21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks.
Dmediatek,mt8186-clock.yaml16 muxes
/linux-5.19.10/Documentation/devicetree/bindings/clock/
Drockchip,rk3399-cru.yaml58 for GRF muxes, if missing any muxes present in the GRF will not be
Dqcom,krait-cc.txt20 Definition: reference to the clock parents of hfpll, secondary muxes.
Dti-clkctrl.txt7 or more clock muxes. There is a clkctrl clock controller typically for each
/linux-5.19.10/Documentation/firmware-guide/acpi/
Dindex.rst25 i2c-muxes
Di2c-muxes.rst7 Describing an I2C device hierarchy that includes I2C muxes requires an ACPI
/linux-5.19.10/drivers/i2c/
DMakefile16 obj-y += algos/ busses/ muxes/
/linux-5.19.10/drivers/gpu/drm/bridge/cadence/
DKconfig26 clock and data muxes.
/linux-5.19.10/drivers/usb/typec/mux/
DKconfig28 Driver for USB muxes controlled by Intel PMC FW. Intel PMC FW can
/linux-5.19.10/Documentation/devicetree/bindings/pinctrl/
Dmarvell,dove-pinctrl.txt88 * group "audio0" internally muxes i2s0 or ac97 controller to the dedicated
90 * group "twsi" internally muxes twsi controller to the dedicated or option pins.
/linux-5.19.10/drivers/soc/aspeed/
DKconfig34 users to perform runtime configuration of the RX muxes among
/linux-5.19.10/drivers/clk/stm32/
Dclk-stm32-core.c103 const struct stm32_mux_cfg *mux = &data->muxes[mux_id]; in stm32_mux_get_parent()
117 const struct stm32_mux_cfg *mux = &data->muxes[mux_id]; in stm32_mux_set_parent()
503 const struct stm32_mux_cfg *mux = &composite->clock_data->muxes[composite->mux_id]; in clk_stm32_has_safe_mux()
Dclk-stm32-core.h62 const struct stm32_mux_cfg *muxes; member
/linux-5.19.10/arch/arm/boot/dts/
Dkeystone-k2e-clocks.dtsi79 * (as cpts, for example) by configuring corresponding clock muxes.
/linux-5.19.10/Documentation/devicetree/bindings/spi/
Dmediatek,spi-mt65xx.yaml59 - description: clock used for the muxes clock
/linux-5.19.10/Documentation/ABI/testing/
Ddebugfs-cros-ec22 This file provides the port role, muxes and power debug

12