Searched refs:mr32 (Results 1 – 7 of 7) sorted by relevance
20 reg = mr32(MVS_GBL_PORT_TYPE); in mvs_64xx_detect_porttype()33 tmp = mr32(MVS_PCS); in mvs_64xx_enable_xmt()79 reg = mr32(MVS_PHY_CTL); in mvs_64xx_stp_reset()129 tmp = mr32(MVS_INT_STAT_SRS_0); in mvs_64xx_clear_srs_irq()135 tmp = mr32(MVS_INT_STAT_SRS_0); in mvs_64xx_clear_srs_irq()152 tmp = mr32(MVS_GBL_CTL); in mvs_64xx_chip_reset()171 tmp = mr32(MVS_GBL_CTL); in mvs_64xx_chip_reset()184 if (!(mr32(MVS_GBL_CTL) & HBA_RST)) in mvs_64xx_chip_reset()187 if (mr32(MVS_GBL_CTL) & HBA_RST) { in mvs_64xx_chip_reset()210 tmp = mr32(MVS_PHY_CTL); in mvs_64xx_phy_disable()[all …]
14 #define mr32(reg) readl(regs + reg) macro18 mr32(reg); \32 return mr32(MVS_CMD_DATA); in mvs_cr32()45 return (port < 4) ? mr32(MVS_P0_SER_CTLSTAT + port * 4) : in mvs_read_phy_ctl()46 mr32(MVS_P4_SER_CTLSTAT + (port - 4) * 4); in mvs_read_phy_ctl()175 tmp = mr32(MVS_INT_STAT_SRS_0); in mvs_int_sata()187 stat = mr32(MVS_INT_STAT); in mvs_int_full()214 return mr32(MVS_RX_CONS_IDX); in mvs_rx_update()
249 tmp = mr32(MVS_PCS); in mvs_94xx_enable_xmt()322 tmp = mr32(MVS_HST_CHIP_CONFIG); in mvs_94xx_sgpio_init()372 tmp = mr32(MVS_PHY_CTL); in mvs_94xx_init()380 cctl = mr32(MVS_CTL) & 0xFFFF; in mvs_94xx_init()387 tmp = mr32(MVS_PHY_CTL); in mvs_94xx_init()441 tmp = mr32(MVS_PA_VSR_PORT); in mvs_94xx_init()502 cctl = mr32(MVS_CTL); in mvs_94xx_init()509 tmp = mr32(MVS_PCS); in mvs_94xx_init()597 tmp = mr32(MVS_GBL_CTL); in mvs_94xx_interrupt_enable()612 tmp = mr32(MVS_GBL_CTL); in mvs_94xx_interrupt_disable()[all …]
324 (((i) > 31) ? mr32(MVS_STP_REG_SET_1) : \325 mr32(MVS_STP_REG_SET_0))
93 - meraki,mr32
16 compatible = "meraki,mr32", "brcm,bcm53016", "brcm,bcm4708";
139 bcm53016-meraki-mr32.dtb \