Searched refs:mmVM_CONTEXT0_CNTL (Results 1 – 17 of 17) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
| D | gfxhub_v1_0.c | 220 tmp = RREG32_SOC15(GC, 0, mmVM_CONTEXT0_CNTL); in gfxhub_v1_0_enable_system_domain()
228 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_CNTL, tmp); in gfxhub_v1_0_enable_system_domain()
347 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_CNTL, in gfxhub_v1_0_gart_disable()
429 SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_CNTL); in gfxhub_v1_0_init()
435 hub->ctx_distance = mmVM_CONTEXT1_CNTL - mmVM_CONTEXT0_CNTL; in gfxhub_v1_0_init()
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| D | gmc_v6_0.c | 515 WREG32(mmVM_CONTEXT0_CNTL, in gmc_v6_0_gart_enable()
592 WREG32(mmVM_CONTEXT0_CNTL, 0); in gmc_v6_0_gart_disable()
1047 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v6_0_vm_fault_interrupt_state()
1049 WREG32(mmVM_CONTEXT0_CNTL, tmp); in gmc_v6_0_vm_fault_interrupt_state()
1055 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v6_0_vm_fault_interrupt_state()
1057 WREG32(mmVM_CONTEXT0_CNTL, tmp); in gmc_v6_0_vm_fault_interrupt_state()
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| D | mmhub_v1_0.c | 201 tmp = RREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_CNTL); in mmhub_v1_0_enable_system_domain()
206 WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_CNTL, tmp); in mmhub_v1_0_enable_system_domain()
347 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_CNTL, in mmhub_v1_0_gart_disable()
433 SOC15_REG_OFFSET(MMHUB, 0, mmVM_CONTEXT0_CNTL); in mmhub_v1_0_init()
439 hub->ctx_distance = mmVM_CONTEXT1_CNTL - mmVM_CONTEXT0_CNTL; in mmhub_v1_0_init()
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| D | gmc_v7_0.c | 662 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v7_0_gart_enable()
666 WREG32(mmVM_CONTEXT0_CNTL, tmp); in gmc_v7_0_gart_enable()
745 WREG32(mmVM_CONTEXT0_CNTL, 0); in gmc_v7_0_gart_disable()
1245 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v7_0_vm_fault_interrupt_state()
1247 WREG32(mmVM_CONTEXT0_CNTL, tmp); in gmc_v7_0_vm_fault_interrupt_state()
1255 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v7_0_vm_fault_interrupt_state()
1257 WREG32(mmVM_CONTEXT0_CNTL, tmp); in gmc_v7_0_vm_fault_interrupt_state()
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| D | gmc_v8_0.c | 901 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v8_0_gart_enable()
905 WREG32(mmVM_CONTEXT0_CNTL, tmp); in gmc_v8_0_gart_enable()
985 WREG32(mmVM_CONTEXT0_CNTL, 0); in gmc_v8_0_gart_disable()
1413 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1415 WREG32(mmVM_CONTEXT0_CNTL, tmp); in gmc_v8_0_vm_fault_interrupt_state()
1423 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1425 WREG32(mmVM_CONTEXT0_CNTL, tmp); in gmc_v8_0_vm_fault_interrupt_state()
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| D | si.c | 91 mmVM_CONTEXT0_CNTL, 0x20000000, 0x20fffed8,
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| D | gmc_7_0_d.h | 545 #define mmVM_CONTEXT0_CNTL 0x504 macro
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| D | gmc_8_2_d.h | 603 #define mmVM_CONTEXT0_CNTL 0x504 macro
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| D | gmc_6_0_d.h | 1217 #define mmVM_CONTEXT0_CNTL 0x0504 macro
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| D | gmc_7_1_d.h | 578 #define mmVM_CONTEXT0_CNTL 0x504 macro
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| D | gmc_8_1_d.h | 601 #define mmVM_CONTEXT0_CNTL 0x504 macro
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
| D | mmhub_1_0_offset.h | 1324 #define mmVM_CONTEXT0_CNTL … macro
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| D | mmhub_9_1_offset.h | 1356 #define mmVM_CONTEXT0_CNTL … macro
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| D | mmhub_9_3_0_offset.h | 1340 #define mmVM_CONTEXT0_CNTL … macro
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 1232 #define mmVM_CONTEXT0_CNTL … macro
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| D | gc_9_1_offset.h | 1251 #define mmVM_CONTEXT0_CNTL … macro
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| D | gc_9_2_1_offset.h | 1189 #define mmVM_CONTEXT0_CNTL … macro
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