Home
last modified time | relevance | path

Searched refs:mmVGT_GSVS_RING_OFFSET_2_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h4104 #define mmVGT_GSVS_RING_OFFSET_2_BASE_IDX … macro
Dgc_9_1_offset.h4334 #define mmVGT_GSVS_RING_OFFSET_2_BASE_IDX … macro
Dgc_9_2_1_offset.h4288 #define mmVGT_GSVS_RING_OFFSET_2_BASE_IDX … macro
Dgc_10_1_0_offset.h6478 #define mmVGT_GSVS_RING_OFFSET_2_BASE_IDX … macro
Dgc_10_3_0_offset.h6109 #define mmVGT_GSVS_RING_OFFSET_2_BASE_IDX … macro