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Searched refs:mmVGA_DISPBUF2_SURFACE_ADDR (Results 1 – 13 of 13) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h4382 #define mmVGA_DISPBUF2_SURFACE_ADDR 0x00C8 macro
Ddce_8_0_d.h5141 #define mmVGA_DISPBUF2_SURFACE_ADDR 0xc8 macro
Ddce_10_0_d.h6024 #define mmVGA_DISPBUF2_SURFACE_ADDR 0xc8 macro
Ddce_11_0_d.h6101 #define mmVGA_DISPBUF2_SURFACE_ADDR 0xc8 macro
Ddce_11_2_d.h7775 #define mmVGA_DISPBUF2_SURFACE_ADDR 0xc8 macro
Ddce_12_0_offset.h566 #define mmVGA_DISPBUF2_SURFACE_ADDR … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h29 #define mmVGA_DISPBUF2_SURFACE_ADDR … macro
Ddcn_3_0_1_offset.h160 #define mmVGA_DISPBUF2_SURFACE_ADDR … macro
Ddcn_1_0_offset.h400 #define mmVGA_DISPBUF2_SURFACE_ADDR … macro
Ddcn_2_1_0_offset.h104 #define mmVGA_DISPBUF2_SURFACE_ADDR … macro
Ddcn_3_0_2_offset.h44 #define mmVGA_DISPBUF2_SURFACE_ADDR … macro
Ddcn_2_0_0_offset.h44 #define mmVGA_DISPBUF2_SURFACE_ADDR … macro
Ddcn_3_0_0_offset.h25 #define mmVGA_DISPBUF2_SURFACE_ADDR … macro