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Searched refs:mmVGA_CACHE_CONTROL (Results 1 – 13 of 13) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h4378 #define mmVGA_CACHE_CONTROL 0x00CB macro
Ddce_8_0_d.h5143 #define mmVGA_CACHE_CONTROL 0xcb macro
Ddce_10_0_d.h6026 #define mmVGA_CACHE_CONTROL 0xcb macro
Ddce_11_0_d.h6103 #define mmVGA_CACHE_CONTROL 0xcb macro
Ddce_11_2_d.h7777 #define mmVGA_CACHE_CONTROL 0xcb macro
Ddce_12_0_offset.h572 #define mmVGA_CACHE_CONTROL macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h35 #define mmVGA_CACHE_CONTROL macro
Ddcn_3_0_1_offset.h166 #define mmVGA_CACHE_CONTROL macro
Ddcn_1_0_offset.h406 #define mmVGA_CACHE_CONTROL macro
Ddcn_2_1_0_offset.h110 #define mmVGA_CACHE_CONTROL macro
Ddcn_3_0_2_offset.h50 #define mmVGA_CACHE_CONTROL macro
Ddcn_2_0_0_offset.h50 #define mmVGA_CACHE_CONTROL macro
Ddcn_3_0_0_offset.h31 #define mmVGA_CACHE_CONTROL macro