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Searched refs:mmUVD_MIF_RECON1_UV_ADDR_CONFIG_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h90 #define mmUVD_MIF_RECON1_UV_ADDR_CONFIG_BASE_IDX macro
Dvcn_2_5_offset.h838 #define mmUVD_MIF_RECON1_UV_ADDR_CONFIG_BASE_IDX macro