Searched refs:mmTPC4_QM_HBW_RD_RATE_LIM_CFG_0 (Results 1 – 2 of 2) sorted by relevance
814 #define mmTPC4_QM_HBW_RD_RATE_LIM_CFG_0 0xF08CA0 macro
11371 mask |= 1U << ((mmTPC4_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()