Searched refs:mmTPC0_QM_GLBL_CFG0 (Results 1 – 6 of 6) sorted by relevance
22 #define mmTPC0_QM_GLBL_CFG0 0xE08000 macro
422 [SP_TPC0_CMDQ] = mmTPC0_QM_GLBL_CFG0,424 [SP_NEXT_TPC] = mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0,3211 (mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0); in gaudi_init_tpc_qman()3317 WREG32(mmTPC0_QM_GLBL_CFG0 + tpc_offset, in gaudi_init_tpc_qmans()3325 tpc_offset += mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0; in gaudi_init_tpc_qmans()3519 WREG32(mmTPC0_QM_GLBL_CFG0 + tpc_offset, 0); in gaudi_disable_tpc_qmans()3520 tpc_offset += mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0; in gaudi_disable_tpc_qmans()
9177 pb_addr = (mmTPC0_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; in gaudi_init_tpc_protection_bits()9178 word_offset = ((mmTPC0_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; in gaudi_init_tpc_protection_bits()9179 mask = 1U << ((mmTPC0_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
729 pb_addr = (mmTPC0_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; in goya_init_tpc_protection_bits()730 word_offset = ((mmTPC0_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; in goya_init_tpc_protection_bits()731 mask = 1 << ((mmTPC0_QM_GLBL_CFG0 & 0x7F) >> 2); in goya_init_tpc_protection_bits()
2003 WREG32(mmTPC0_QM_GLBL_CFG0 + reg_off, QMAN_TPC_ENABLE); in goya_init_tpc_qman()2099 WREG32(mmTPC0_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()