Searched refs:mmSPI_GDBG_WAVE_CNTL (Results 1 – 8 of 8) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_amdkfd_gfx_v10_3.c | 668 mmSPI_GDBG_WAVE_CNTL)); 674 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data); 679 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), orig_stall_vmid); 705 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL)); 707 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data); 716 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL)); 718 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data); 744 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL)); 749 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_7_0_d.h | 1420 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
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D | gfx_7_2_d.h | 1437 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
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D | gfx_8_0_d.h | 1616 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
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D | gfx_8_1_d.h | 1584 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_0_offset.h | 2715 #define mmSPI_GDBG_WAVE_CNTL … macro
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D | gc_9_2_1_offset.h | 2901 #define mmSPI_GDBG_WAVE_CNTL … macro
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D | gc_10_3_0_offset.h | 4846 #define mmSPI_GDBG_WAVE_CNTL … macro
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