Searched refs:mmSDMA1_RLC3_RB_WPTR_POLL_CNTL (Results 1 – 6 of 6) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v5_0.c | 86 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
110 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
119 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
124 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
133 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
159 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
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| D | sdma_v4_0.c | 203 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma1/ |
| D | sdma1_4_2_2_offset.h | 636 #define mmSDMA1_RLC3_RB_WPTR_POLL_CNTL … macro
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| D | sdma1_4_2_offset.h | 632 #define mmSDMA1_RLC3_RB_WPTR_POLL_CNTL … macro
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_10_1_0_offset.h | 1632 #define mmSDMA1_RLC3_RB_WPTR_POLL_CNTL … macro
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| D | gc_10_3_0_offset.h | 1686 #define mmSDMA1_RLC3_RB_WPTR_POLL_CNTL … macro
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