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Searched refs:mmSDMA1_PAGE_RB_WPTR_POLL_CNTL (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_offset.h300 #define mmSDMA1_PAGE_RB_WPTR_POLL_CNTL 0x00e7 macro
Dsdma1_4_2_2_offset.h300 #define mmSDMA1_PAGE_RB_WPTR_POLL_CNTL macro
Dsdma1_4_2_offset.h296 #define mmSDMA1_PAGE_RB_WPTR_POLL_CNTL macro
/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Dsdma_v5_0.c82 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
106 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
155 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
Dsdma_v4_0.c107 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
194 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h1300 #define mmSDMA1_PAGE_RB_WPTR_POLL_CNTL macro
Dgc_10_3_0_offset.h1334 #define mmSDMA1_PAGE_RB_WPTR_POLL_CNTL macro