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Searched refs:mmSDMA0_UTCL1_PAGE (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_offset.h156 #define mmSDMA0_UTCL1_PAGE … macro
Dsdma0_4_0_offset.h158 #define mmSDMA0_UTCL1_PAGE 0x0048 macro
Dsdma0_4_2_2_offset.h158 #define mmSDMA0_UTCL1_PAGE … macro
Dsdma0_4_2_offset.h158 #define mmSDMA0_UTCL1_PAGE … macro
/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Dsdma_v5_0.c79 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_UTCL1_PAGE, 0x00ffffff, 0x000c5c00),
150 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_UTCL1_PAGE, 0x007fffff, 0x004c5c00),
822 temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE)); in sdma_v5_0_gfx_resume()
826 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE), temp); in sdma_v5_0_gfx_resume()
Dsdma_v4_0.c101 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0),
147 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003e0),
182 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0),
291 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003e0),
Dsdma_v5_2.c720 temp = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE)); in sdma_v5_2_gfx_resume()
726 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE), temp); in sdma_v5_2_gfx_resume()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h133 #define mmSDMA0_UTCL1_PAGE … macro
Dgc_10_3_0_offset.h130 #define mmSDMA0_UTCL1_PAGE … macro