Searched refs:mmSDMA0_STATUS_REG (Results 1 – 17 of 17) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
D | sdma_v5_2.c | 1457 u32 tmp = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_STATUS_REG)); in sdma_v5_2_is_idle() 1473 sdma0 = RREG32(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_STATUS_REG)); in sdma_v5_2_wait_for_idle() 1474 sdma1 = RREG32(sdma_v5_2_get_reg_offset(adev, 1, mmSDMA0_STATUS_REG)); in sdma_v5_2_wait_for_idle() 1475 sdma2 = RREG32(sdma_v5_2_get_reg_offset(adev, 2, mmSDMA0_STATUS_REG)); in sdma_v5_2_wait_for_idle() 1476 sdma3 = RREG32(sdma_v5_2_get_reg_offset(adev, 3, mmSDMA0_STATUS_REG)); in sdma_v5_2_wait_for_idle()
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D | sdma_v5_0.c | 1490 u32 tmp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_STATUS_REG)); in sdma_v5_0_is_idle() 1506 sdma0 = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_STATUS_REG)); in sdma_v5_0_wait_for_idle() 1507 sdma1 = RREG32(sdma_v5_0_get_reg_offset(adev, 1, mmSDMA0_STATUS_REG)); in sdma_v5_0_wait_for_idle()
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D | cik.c | 1052 {mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET}, 1053 {mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET},
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D | vi.c | 678 {mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET}, 679 {mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET},
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D | nv.c | 342 { SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},
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D | sdma_v4_0.c | 2069 u32 tmp = RREG32_SDMA(i, mmSDMA0_STATUS_REG); in sdma_v4_0_is_idle() 2086 sdma[j] = RREG32_SDMA(j, mmSDMA0_STATUS_REG); in sdma_v4_0_wait_for_idle()
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D | soc15.c | 385 { SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
D | sdma0_4_1_offset.h | 86 #define mmSDMA0_STATUS_REG … macro
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D | sdma0_4_0_offset.h | 88 #define mmSDMA0_STATUS_REG 0x0025 macro
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D | sdma0_4_2_2_offset.h | 88 #define mmSDMA0_STATUS_REG … macro
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D | sdma0_4_2_offset.h | 88 #define mmSDMA0_STATUS_REG … macro
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_2_4_d.h | 169 #define mmSDMA0_STATUS_REG 0x340d macro
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D | oss_3_0_1_d.h | 166 #define mmSDMA0_STATUS_REG 0x340d macro
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D | oss_2_0_d.h | 232 #define mmSDMA0_STATUS_REG 0x340d macro
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D | oss_3_0_d.h | 303 #define mmSDMA0_STATUS_REG 0x340d macro
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_10_1_0_offset.h | 63 #define mmSDMA0_STATUS_REG … macro
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D | gc_10_3_0_offset.h | 68 #define mmSDMA0_STATUS_REG … macro
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