Searched refs:mmSDMA0_RLC0_RB_WPTR_POLL_CNTL (Results 1 – 12 of 12) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
| D | sdma0_4_1_offset.h | 304 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL … macro
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| D | sdma0_4_0_offset.h | 392 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL 0x0147 macro
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| D | sdma0_4_2_2_offset.h | 392 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL … macro
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| D | sdma0_4_2_offset.h | 388 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL … macro
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_2_4_d.h | 219 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL 0x3505 macro
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| D | oss_3_0_1_d.h | 258 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL 0x3505 macro
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| D | oss_2_0_d.h | 273 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL 0x3505 macro
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| D | oss_3_0_d.h | 380 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL 0x3505 macro
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| /linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v4_0.c | 98 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
144 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
152 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff0, 0x00403000),
167 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff0, 0x00403000),
289 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
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| D | sdma_v5_0.c | 71 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
97 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
142 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_10_1_0_offset.h | 384 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL … macro
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| D | gc_10_3_0_offset.h | 380 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL … macro
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