Searched refs:mmSDMA0_RLC0_RB_CNTL (Results 1 – 17 of 17) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_amdkfd_arcturus.c | 80 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 113 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 135 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_arcturus_hqd_sdma_load() 185 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_arcturus_hqd_sdma_load() 204 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_arcturus_hqd_sdma_dump() 232 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_arcturus_hqd_sdma_is_occupied() 252 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_arcturus_hqd_sdma_destroy() 254 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_arcturus_hqd_sdma_destroy() 268 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_arcturus_hqd_sdma_destroy() 269 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_arcturus_hqd_sdma_destroy()
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D | amdgpu_amdkfd_gfx_v10.c | 163 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL, in get_sdma_rlc_reg_offset() 171 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL in get_sdma_rlc_reg_offset() 175 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 384 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 434 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 453 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 502 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 635 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 637 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 651 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() [all …]
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D | amdgpu_amdkfd_gfx_v10_3.c | 142 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 146 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 150 mmSDMA2_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 154 mmSDMA3_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 159 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 371 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in hqd_sdma_load_v10_3() 421 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in hqd_sdma_load_v10_3() 440 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in hqd_sdma_dump_v10_3() 490 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in hqd_sdma_is_occupied_v10_3() 560 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in hqd_sdma_destroy_v10_3() [all …]
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D | amdgpu_amdkfd_gfx_v9.c | 193 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 197 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 202 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 396 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 446 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 465 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 514 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 586 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 588 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 602 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() [all …]
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D | amdgpu_amdkfd_gfx_v7.c | 249 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 288 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 307 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 350 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 470 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 472 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 486 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() 487 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
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D | amdgpu_amdkfd_gfx_v8.c | 272 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 311 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 330 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 382 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 505 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 507 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 521 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() 522 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
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D | cikd.h | 563 #define KFD_CIK_SDMA_QUEUE_OFFSET (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL)
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
D | sdma0_4_1_offset.h | 290 #define mmSDMA0_RLC0_RB_CNTL … macro
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D | sdma0_4_0_offset.h | 378 #define mmSDMA0_RLC0_RB_CNTL 0x0140 macro
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D | sdma0_4_2_2_offset.h | 378 #define mmSDMA0_RLC0_RB_CNTL … macro
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D | sdma0_4_2_offset.h | 374 #define mmSDMA0_RLC0_RB_CNTL … macro
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_2_4_d.h | 214 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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D | oss_3_0_1_d.h | 253 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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D | oss_2_0_d.h | 268 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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D | oss_3_0_d.h | 375 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_10_1_0_offset.h | 370 #define mmSDMA0_RLC0_RB_CNTL … macro
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D | gc_10_3_0_offset.h | 366 #define mmSDMA0_RLC0_RB_CNTL … macro
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