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Searched refs:mmSDMA0_RLC0_RB_BASE_HI (Results 1 – 16 of 16) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_arcturus.c176 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI, in kgd_arcturus_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v7.c279 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI, in kgd_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v8.c302 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI, in kgd_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v10.c425 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI, in kgd_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v9.c437 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI, in kgd_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v10_3.c412 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI, in hqd_sdma_load_v10_3()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_offset.h294 #define mmSDMA0_RLC0_RB_BASE_HI macro
Dsdma0_4_0_offset.h382 #define mmSDMA0_RLC0_RB_BASE_HI 0x0142 macro
Dsdma0_4_2_2_offset.h382 #define mmSDMA0_RLC0_RB_BASE_HI macro
Dsdma0_4_2_offset.h378 #define mmSDMA0_RLC0_RB_BASE_HI macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h216 #define mmSDMA0_RLC0_RB_BASE_HI 0x3502 macro
Doss_3_0_1_d.h255 #define mmSDMA0_RLC0_RB_BASE_HI 0x3502 macro
Doss_2_0_d.h270 #define mmSDMA0_RLC0_RB_BASE_HI 0x3502 macro
Doss_3_0_d.h377 #define mmSDMA0_RLC0_RB_BASE_HI 0x3502 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h374 #define mmSDMA0_RLC0_RB_BASE_HI macro
Dgc_10_3_0_offset.h370 #define mmSDMA0_RLC0_RB_BASE_HI macro