Home
last modified time | relevance | path

Searched refs:mmSDMA0_RLC0_CSA_ADDR_HI (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_arcturus.c206 for (reg = mmSDMA0_RLC0_STATUS; reg <= mmSDMA0_RLC0_CSA_ADDR_HI; reg++) in kgd_arcturus_hqd_sdma_dump()
Damdgpu_amdkfd_gfx_v8.c335 for (reg = mmSDMA0_RLC0_CSA_ADDR_LO; reg <= mmSDMA0_RLC0_CSA_ADDR_HI; in kgd_hqd_sdma_dump()
Damdgpu_amdkfd_gfx_v10.c455 for (reg = mmSDMA0_RLC0_STATUS; reg <= mmSDMA0_RLC0_CSA_ADDR_HI; reg++) in kgd_hqd_sdma_dump()
Damdgpu_amdkfd_gfx_v9.c467 for (reg = mmSDMA0_RLC0_STATUS; reg <= mmSDMA0_RLC0_CSA_ADDR_HI; reg++) in kgd_hqd_sdma_dump()
Damdgpu_amdkfd_gfx_v10_3.c442 for (reg = mmSDMA0_RLC0_STATUS; reg <= mmSDMA0_RLC0_CSA_ADDR_HI; reg++) in hqd_sdma_dump_v10_3()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_offset.h338 #define mmSDMA0_RLC0_CSA_ADDR_HI … macro
Dsdma0_4_0_offset.h426 #define mmSDMA0_RLC0_CSA_ADDR_HI 0x016d macro
Dsdma0_4_2_2_offset.h426 #define mmSDMA0_RLC0_CSA_ADDR_HI … macro
Dsdma0_4_2_offset.h422 #define mmSDMA0_RLC0_CSA_ADDR_HI … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h238 #define mmSDMA0_RLC0_CSA_ADDR_HI 0x352d macro
Doss_3_0_1_d.h277 #define mmSDMA0_RLC0_CSA_ADDR_HI 0x352d macro
Doss_3_0_d.h399 #define mmSDMA0_RLC0_CSA_ADDR_HI 0x352d macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h417 #define mmSDMA0_RLC0_CSA_ADDR_HI … macro
Dgc_10_3_0_offset.h414 #define mmSDMA0_RLC0_CSA_ADDR_HI … macro