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Searched refs:mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_offset.h264 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO macro
Dsdma0_4_0_offset.h268 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO 0x00b3 macro
Dsdma0_4_2_2_offset.h268 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO macro
Dsdma0_4_2_offset.h264 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h194 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO 0x3487 macro
Doss_3_0_1_d.h221 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO 0x3487 macro
Doss_2_0_d.h253 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO 0x3487 macro
Doss_3_0_d.h346 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO 0x3487 macro
/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Dsdma_v3_0.c718 WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO + sdma_offsets[i], in sdma_v3_0_gfx_resume()
Dsdma_v5_2.c646 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO), in sdma_v5_2_gfx_resume()
Dsdma_v5_0.c745 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO), in sdma_v5_0_gfx_resume()
Dsdma_v4_0.c1226 WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO, in sdma_v4_0_gfx_resume()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h261 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO macro
Dgc_10_3_0_offset.h248 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO macro