Searched refs:mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI (Results 1 – 14 of 14) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
D | sdma0_4_1_offset.h | 262 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI … macro
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D | sdma0_4_0_offset.h | 266 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI 0x00b2 macro
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D | sdma0_4_2_2_offset.h | 266 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI … macro
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D | sdma0_4_2_offset.h | 262 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI … macro
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_2_4_d.h | 193 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI 0x3486 macro
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D | oss_3_0_1_d.h | 220 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI 0x3486 macro
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D | oss_2_0_d.h | 252 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI 0x3486 macro
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D | oss_3_0_d.h | 345 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI 0x3486 macro
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/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
D | sdma_v3_0.c | 720 WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI + sdma_offsets[i], in sdma_v3_0_gfx_resume()
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D | sdma_v5_2.c | 648 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI), in sdma_v5_2_gfx_resume()
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D | sdma_v5_0.c | 747 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI), in sdma_v5_0_gfx_resume()
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D | sdma_v4_0.c | 1228 WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI, in sdma_v4_0_gfx_resume()
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_10_1_0_offset.h | 259 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI … macro
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D | gc_10_3_0_offset.h | 246 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI … macro
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