Searched refs:mmSDMA0_GFX_RB_BASE (Results 1 – 16 of 16) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
| D | sdma0_4_1_offset.h | 206 #define mmSDMA0_GFX_RB_BASE … macro
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| D | sdma0_4_0_offset.h | 210 #define mmSDMA0_GFX_RB_BASE 0x0081 macro
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| D | sdma0_4_2_2_offset.h | 210 #define mmSDMA0_GFX_RB_BASE … macro
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| D | sdma0_4_2_offset.h | 206 #define mmSDMA0_GFX_RB_BASE … macro
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_2_4_d.h | 188 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
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| D | oss_3_0_1_d.h | 215 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
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| D | oss_2_0_d.h | 247 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
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| D | oss_3_0_d.h | 340 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
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| /linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v2_4.c | 462 WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8); in sdma_v2_4_gfx_resume()
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| D | cik_sdma.c | 484 WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8); in cik_sdma_gfx_resume()
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| D | sdma_v3_0.c | 701 WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8); in sdma_v3_0_gfx_resume()
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| D | sdma_v5_2.c | 666 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE), ring->gpu_addr >> 8); in sdma_v5_2_gfx_resume()
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| D | sdma_v5_0.c | 765 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE), in sdma_v5_0_gfx_resume()
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| D | sdma_v4_0.c | 1200 WREG32_SDMA(i, mmSDMA0_GFX_RB_BASE, ring->gpu_addr >> 8); in sdma_v4_0_gfx_resume()
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_10_1_0_offset.h | 204 #define mmSDMA0_GFX_RB_BASE … macro
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| D | gc_10_3_0_offset.h | 190 #define mmSDMA0_GFX_RB_BASE … macro
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