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Searched refs:mmSDMA0_GFX_IB_CNTL (Results 1 – 17 of 17) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Dsdma_v3_0.c84 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
103 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
122 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
136 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
150 mmSDMA0_GFX_IB_CNTL, 0x00000100, 0x00000100,
170 mmSDMA0_GFX_IB_CNTL, 0x00000100, 0x00000100,
532 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_stop()
534 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_stop()
740 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_resume()
746 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_resume()
Dmxgpu_vi.c108 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
247 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
Dsdma_v2_4.c358 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_stop()
360 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_stop()
472 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_resume()
478 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_resume()
Dsdma_v5_2.c499 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_stop()
501 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_stop()
738 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_resume()
744 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_resume()
935 mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_mqd_init()
Dsdma_v5_0.c596 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_stop()
598 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_stop()
840 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_resume()
846 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_resume()
991 mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_mqd_init()
Dsdma_v4_0.c92 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_IB_CNTL, 0x800f0100, 0x00000100),
140 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100),
1006 ib_cntl = RREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL); in sdma_v4_0_gfx_stop()
1008 WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl); in sdma_v4_0_gfx_stop()
1240 ib_cntl = RREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL); in sdma_v4_0_gfx_resume()
1246 WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl); in sdma_v4_0_gfx_resume()
Dcik_sdma.c325 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], 0); in cik_sdma_gfx_stop()
499 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in cik_sdma_gfx_resume()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_offset.h224 #define mmSDMA0_GFX_IB_CNTL … macro
Dsdma0_4_0_offset.h228 #define mmSDMA0_GFX_IB_CNTL 0x008a macro
Dsdma0_4_2_2_offset.h228 #define mmSDMA0_GFX_IB_CNTL … macro
Dsdma0_4_2_offset.h224 #define mmSDMA0_GFX_IB_CNTL … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h197 #define mmSDMA0_GFX_IB_CNTL 0x348a macro
Doss_3_0_1_d.h224 #define mmSDMA0_GFX_IB_CNTL 0x348a macro
Doss_2_0_d.h256 #define mmSDMA0_GFX_IB_CNTL 0x348a macro
Doss_3_0_d.h349 #define mmSDMA0_GFX_IB_CNTL 0x348a macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h222 #define mmSDMA0_GFX_IB_CNTL … macro
Dgc_10_3_0_offset.h208 #define mmSDMA0_GFX_IB_CNTL … macro