Searched refs:mmRLC_SRM_CNTL (Results 1 – 10 of 10) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| D | polaris10_pwrvirus.h | 50 { 0x00000002, mmRLC_SRM_CNTL },
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_8_0_d.h | 1452 #define mmRLC_SRM_CNTL 0xec80 macro
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| D | gfx_8_1_d.h | 1448 #define mmRLC_SRM_CNTL 0xec80 macro
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| /linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_0.c | 2765 tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL)); in gfx_v9_1_init_rlc_save_restore_list()
2767 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL), tmp); in gfx_v9_1_init_rlc_save_restore_list()
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| D | gfx_v10_0.c | 5362 tmp = RREG32_SOC15(GC, 0, mmRLC_SRM_CNTL); in gfx_v10_0_rlc_enable_srm()
5365 WREG32_SOC15(GC, 0, mmRLC_SRM_CNTL, tmp); in gfx_v10_0_rlc_enable_srm()
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 6141 #define mmRLC_SRM_CNTL … macro
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| D | gc_9_1_offset.h | 6363 #define mmRLC_SRM_CNTL … macro
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| D | gc_9_2_1_offset.h | 6339 #define mmRLC_SRM_CNTL … macro
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| D | gc_10_1_0_offset.h | 9455 #define mmRLC_SRM_CNTL … macro
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| D | gc_10_3_0_offset.h | 9289 #define mmRLC_SRM_CNTL … macro
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