Searched refs:mmPA_CL_ENHANCE (Results 1 – 14 of 14) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
D | si.c | 74 mmPA_CL_ENHANCE, 0xf000001f, 0x00000007, 130 mmPA_CL_ENHANCE, 0xf000001f, 0x00000007, 313 mmPA_CL_ENHANCE, 0xf000001f, 0x00000007, 351 mmPA_CL_ENHANCE, 0xf000001f, 0x00000007, 400 mmPA_CL_ENHANCE, 0xf000001f, 0x00000007,
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D | gfx_v10_0.c | 3178 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007), 3227 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007), 3274 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007), 3305 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007), 3326 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0x01000000, 0x01200007), 3365 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007), 3441 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007), 3466 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf000003f, 0x01200007),
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D | gfx_v6_0.c | 1775 WREG32(mmPA_CL_ENHANCE, PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK | in gfx_v6_0_constants_init()
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D | gfx_v7_0.c | 2036 WREG32(mmPA_CL_ENHANCE, PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK | in gfx_v7_0_constants_init()
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_6_0_d.h | 802 #define mmPA_CL_ENHANCE 0x2285 macro
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D | gfx_7_0_d.h | 952 #define mmPA_CL_ENHANCE 0x2285 macro
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D | gfx_7_2_d.h | 965 #define mmPA_CL_ENHANCE 0x2285 macro
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D | gfx_8_0_d.h | 1047 #define mmPA_CL_ENHANCE 0x2285 macro
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D | gfx_8_1_d.h | 1047 #define mmPA_CL_ENHANCE 0x2285 macro
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/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_0_offset.h | 335 #define mmPA_CL_ENHANCE … macro
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D | gc_9_1_offset.h | 331 #define mmPA_CL_ENHANCE … macro
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D | gc_9_2_1_offset.h | 325 #define mmPA_CL_ENHANCE … macro
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D | gc_10_1_0_offset.h | 2361 #define mmPA_CL_ENHANCE … macro
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D | gc_10_3_0_offset.h | 2446 #define mmPA_CL_ENHANCE … macro
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