Home
last modified time | relevance | path

Searched refs:mmOTG5_OTG_DRR_CONTROL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h7572 #define mmOTG5_OTG_DRR_CONTROL_BASE_IDX … macro
Ddcn_2_1_0_offset.h9206 #define mmOTG5_OTG_DRR_CONTROL_BASE_IDX … macro
Ddcn_2_0_0_offset.h10237 #define mmOTG5_OTG_DRR_CONTROL_BASE_IDX … macro
Ddcn_3_0_0_offset.h9961 #define mmOTG5_OTG_DRR_CONTROL_BASE_IDX … macro