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Searched refs:mmMPCC2_MPCC_UPDATE_LOCK_SEL (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h3649 #define mmMPCC2_MPCC_UPDATE_LOCK_SEL … macro
Ddcn_3_0_1_offset.h10318 #define mmMPCC2_MPCC_UPDATE_LOCK_SEL … macro
Ddcn_1_0_offset.h5435 #define mmMPCC2_MPCC_UPDATE_LOCK_SEL … macro
Ddcn_2_1_0_offset.h5676 #define mmMPCC2_MPCC_UPDATE_LOCK_SEL … macro
Ddcn_3_0_2_offset.h12542 #define mmMPCC2_MPCC_UPDATE_LOCK_SEL … macro
Ddcn_2_0_0_offset.h6614 #define mmMPCC2_MPCC_UPDATE_LOCK_SEL … macro
Ddcn_3_0_0_offset.h13826 #define mmMPCC2_MPCC_UPDATE_LOCK_SEL … macro