Searched refs:mmMP1_SMN_C2PMSG_90 (Results 1 – 10 of 10) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| D | smu9_smumgr.c | 76 reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu9_wait_for_response()
83 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu9_wait_for_response()
123 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in smu9_send_msg_to_smc()
153 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in smu9_send_msg_to_smc_with_parameter()
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| D | smu10_smumgr.c | 54 reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu10_wait_for_response()
59 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu10_wait_for_response()
85 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in smu10_send_msg_to_smc()
103 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in smu10_send_msg_to_smc_with_parameter()
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| D | vega20_smumgr.c | 75 reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in vega20_wait_for_response()
80 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90); in vega20_wait_for_response()
112 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in vega20_send_msg_to_smc()
138 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in vega20_send_msg_to_smc_with_parameter()
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| /linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/ |
| D | smu_cmn.c | 51 #define mmMP1_SMN_C2PMSG_90 … macro
145 reg = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90); in __smu_cmn_poll_stat()
272 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in __smu_cmn_send_msg()
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/mp/ |
| D | mp_10_0_offset.h | 298 #define mmMP1_SMN_C2PMSG_90 … macro
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| D | mp_12_0_0_offset.h | 298 #define mmMP1_SMN_C2PMSG_90 … macro
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| D | mp_11_0_8_offset.h | 298 #define mmMP1_SMN_C2PMSG_90 … macro
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| D | mp_11_0_offset.h | 300 #define mmMP1_SMN_C2PMSG_90 … macro
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| D | mp_9_0_offset.h | 310 #define mmMP1_SMN_C2PMSG_90 0x029a macro
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| D | mp_11_5_0_offset.h | 298 #define mmMP1_SMN_C2PMSG_90 … macro
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