Home
last modified time | relevance | path

Searched refs:mmMC_SEQ_RD_CTL_D1_LP (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_d.h931 #define mmMC_SEQ_RD_CTL_D1_LP 0x0AC8 macro
Dgmc_7_1_d.h817 #define mmMC_SEQ_RD_CTL_D1_LP 0xac8 macro
Dgmc_8_1_d.h921 #define mmMC_SEQ_RD_CTL_D1_LP 0xac8 macro
/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c2424 *out_reg = mmMC_SEQ_RD_CTL_D1_LP; in iceland_check_s0_mc_reg_index()
2632 …cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ… in iceland_initialize_mc_reg_table()
Dci_smumgr.c2498 *out_reg = mmMC_SEQ_RD_CTL_D1_LP; in ci_check_s0_mc_reg_index()
2706 …cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ… in ci_initialize_mc_reg_table()
Dtonga_smumgr.c2887 *out_reg = mmMC_SEQ_RD_CTL_D1_LP; in tonga_check_s0_mc_reg_index()
3113 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, in tonga_initialize_mc_reg_table()
Dfiji_smumgr.c2533 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, in fiji_initialize_mc_reg_table()