Home
last modified time | relevance | path

Searched refs:mmINTERRUPT_CNTL (Results 1 – 17 of 17) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Dnbio_v7_0.c229 interrupt_cntl = RREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL); in nbio_v7_0_ih_control()
236 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); in nbio_v7_0_ih_control()
Dcik_ih.c117 interrupt_cntl = RREG32(mmINTERRUPT_CNTL); in cik_ih_irq_init()
124 WREG32(mmINTERRUPT_CNTL, interrupt_cntl); in cik_ih_irq_init()
Dcz_ih.c117 interrupt_cntl = RREG32(mmINTERRUPT_CNTL); in cz_ih_irq_init()
124 WREG32(mmINTERRUPT_CNTL, interrupt_cntl); in cz_ih_irq_init()
Diceland_ih.c117 interrupt_cntl = RREG32(mmINTERRUPT_CNTL); in iceland_ih_irq_init()
124 WREG32(mmINTERRUPT_CNTL, interrupt_cntl); in iceland_ih_irq_init()
Dnbio_v6_1.c154 interrupt_cntl = RREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL); in nbio_v6_1_ih_control()
161 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); in nbio_v6_1_ih_control()
Dtonga_ih.c113 interrupt_cntl = RREG32(mmINTERRUPT_CNTL); in tonga_ih_irq_init()
120 WREG32(mmINTERRUPT_CNTL, interrupt_cntl); in tonga_ih_irq_init()
Dnbio_v2_3.c213 interrupt_cntl = RREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL); in nbio_v2_3_ih_control()
225 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); in nbio_v2_3_ih_control()
Dnbio_v7_4.c297 interrupt_cntl = RREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL); in nbio_v7_4_ih_control()
304 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); in nbio_v7_4_ih_control()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_3_0_d.h633 #define mmINTERRUPT_CNTL 0x151A macro
Dbif_4_1_d.h45 #define mmINTERRUPT_CNTL 0x151a macro
Dbif_5_0_d.h53 #define mmINTERRUPT_CNTL 0x151a macro
Dbif_5_1_d.h45 #define mmINTERRUPT_CNTL 0x151a macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/nbif/
Dnbif_6_1_offset.h811 #define mmINTERRUPT_CNTL macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_6_1_offset.h2460 #define mmINTERRUPT_CNTL macro
Dnbio_7_0_offset.h4344 #define mmINTERRUPT_CNTL macro
Dnbio_7_4_offset.h2784 #define mmINTERRUPT_CNTL macro
Dnbio_2_3_offset.h454 #define mmINTERRUPT_CNTL macro