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Searched refs:mmDP_DTO1_PHASE (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3541 #define mmDP_DTO1_PHASE 0x0145 macro
Ddce_8_0_d.h1042 #define mmDP_DTO1_PHASE 0x145 macro
Ddce_10_0_d.h1200 #define mmDP_DTO1_PHASE 0x145 macro
Ddce_11_0_d.h1012 #define mmDP_DTO1_PHASE 0x145 macro
Ddce_11_2_d.h1087 #define mmDP_DTO1_PHASE 0x145 macro
Ddce_12_0_offset.h782 #define mmDP_DTO1_PHASE … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h98 #define mmDP_DTO1_PHASE … macro
Ddcn_3_0_3_offset.h189 #define mmDP_DTO1_PHASE … macro
Ddcn_3_0_1_offset.h278 #define mmDP_DTO1_PHASE … macro
Ddcn_1_0_offset.h582 #define mmDP_DTO1_PHASE … macro
Ddcn_2_1_0_offset.h232 #define mmDP_DTO1_PHASE … macro
Ddcn_3_0_2_offset.h216 #define mmDP_DTO1_PHASE … macro
Ddcn_2_0_0_offset.h220 #define mmDP_DTO1_PHASE … macro
Ddcn_3_0_0_offset.h201 #define mmDP_DTO1_PHASE … macro