Home
last modified time | relevance | path

Searched refs:mmDP_AUX0_AUX_INTERRUPT_CONTROL (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3437 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL 0x1883 macro
Ddce_8_0_d.h4201 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL 0x1883 macro
Ddce_10_0_d.h4849 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL 0x5c03 macro
Ddce_11_0_d.h4928 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL 0x5c03 macro
Ddce_11_2_d.h6190 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL 0x5c03 macro
Ddce_12_0_offset.h9806 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5228 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL macro
Ddcn_3_0_3_offset.h4687 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL macro
Ddcn_3_0_1_offset.h7576 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL macro
Ddcn_1_0_offset.h7921 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL macro
Ddcn_2_1_0_offset.h9467 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL macro
Ddcn_3_0_2_offset.h9143 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL macro
Ddcn_2_0_0_offset.h10520 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL macro
Ddcn_3_0_0_offset.h10236 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL macro