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Searched refs:mmDP3_DP_SEC_CNTL (Results 1 – 12 of 12) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3306 #define mmDP3_DP_SEC_CNTL 0x45A0 macro
Ddce_8_0_d.h4007 #define mmDP3_DP_SEC_CNTL 0x45a0 macro
Ddce_10_0_d.h4639 #define mmDP3_DP_SEC_CNTL 0x4dc3 macro
Ddce_11_0_d.h4670 #define mmDP3_DP_SEC_CNTL 0x4dc3 macro
Ddce_11_2_d.h5902 #define mmDP3_DP_SEC_CNTL 0x4dc3 macro
Ddce_12_0_offset.h11110 #define mmDP3_DP_SEC_CNTL macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_offset.h8998 #define mmDP3_DP_SEC_CNTL macro
Ddcn_1_0_offset.h9337 #define mmDP3_DP_SEC_CNTL macro
Ddcn_2_1_0_offset.h10901 #define mmDP3_DP_SEC_CNTL macro
Ddcn_3_0_2_offset.h10620 #define mmDP3_DP_SEC_CNTL macro
Ddcn_2_0_0_offset.h11988 #define mmDP3_DP_SEC_CNTL macro
Ddcn_3_0_0_offset.h11755 #define mmDP3_DP_SEC_CNTL macro