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Searched refs:mmDP1_DP_SEC_CNTL (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3202 #define mmDP1_DP_SEC_CNTL 0x1FA0 macro
Ddce_8_0_d.h4005 #define mmDP1_DP_SEC_CNTL 0x1fa0 macro
Ddce_10_0_d.h4637 #define mmDP1_DP_SEC_CNTL 0x4bc3 macro
Ddce_11_0_d.h4668 #define mmDP1_DP_SEC_CNTL 0x4bc3 macro
Ddce_11_2_d.h5900 #define mmDP1_DP_SEC_CNTL 0x4bc3 macro
Ddce_12_0_offset.h10542 #define mmDP1_DP_SEC_CNTL … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5842 #define mmDP1_DP_SEC_CNTL … macro
Ddcn_3_0_3_offset.h5351 #define mmDP1_DP_SEC_CNTL … macro
Ddcn_3_0_1_offset.h8318 #define mmDP1_DP_SEC_CNTL … macro
Ddcn_1_0_offset.h8717 #define mmDP1_DP_SEC_CNTL … macro
Ddcn_2_1_0_offset.h10241 #define mmDP1_DP_SEC_CNTL … macro
Ddcn_3_0_2_offset.h9933 #define mmDP1_DP_SEC_CNTL … macro
Ddcn_2_0_0_offset.h11332 #define mmDP1_DP_SEC_CNTL … macro
Ddcn_3_0_0_offset.h11068 #define mmDP1_DP_SEC_CNTL … macro