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Searched refs:mmDP1_DP_MSE_MISC_CNTL (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3190 #define mmDP1_DP_MSE_MISC_CNTL 0x1FDB macro
Ddce_8_0_d.h4157 #define mmDP1_DP_MSE_MISC_CNTL 0x1fdb macro
Ddce_10_0_d.h4789 #define mmDP1_DP_MSE_MISC_CNTL 0x4bd7 macro
Ddce_11_0_d.h4858 #define mmDP1_DP_MSE_MISC_CNTL 0x4bd7 macro
Ddce_11_2_d.h6090 #define mmDP1_DP_MSE_MISC_CNTL 0x4bd7 macro
Ddce_12_0_offset.h10580 #define mmDP1_DP_MSE_MISC_CNTL macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5880 #define mmDP1_DP_MSE_MISC_CNTL macro
Ddcn_3_0_3_offset.h5389 #define mmDP1_DP_MSE_MISC_CNTL macro
Ddcn_3_0_1_offset.h8356 #define mmDP1_DP_MSE_MISC_CNTL macro
Ddcn_1_0_offset.h8755 #define mmDP1_DP_MSE_MISC_CNTL macro
Ddcn_2_1_0_offset.h10279 #define mmDP1_DP_MSE_MISC_CNTL macro
Ddcn_3_0_2_offset.h9971 #define mmDP1_DP_MSE_MISC_CNTL macro
Ddcn_2_0_0_offset.h11370 #define mmDP1_DP_MSE_MISC_CNTL macro
Ddcn_3_0_0_offset.h11106 #define mmDP1_DP_MSE_MISC_CNTL macro