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Searched refs:mmDP0_DP_SEC_CNTL (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3150 #define mmDP0_DP_SEC_CNTL 0x1CA0 macro
Ddce_8_0_d.h4004 #define mmDP0_DP_SEC_CNTL 0x1ca0 macro
Ddce_10_0_d.h4636 #define mmDP0_DP_SEC_CNTL 0x4ac3 macro
Ddce_11_0_d.h4667 #define mmDP0_DP_SEC_CNTL 0x4ac3 macro
Ddce_11_2_d.h5899 #define mmDP0_DP_SEC_CNTL 0x4ac3 macro
Ddce_12_0_offset.h10258 #define mmDP0_DP_SEC_CNTL … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5522 #define mmDP0_DP_SEC_CNTL … macro
Ddcn_3_0_3_offset.h5008 #define mmDP0_DP_SEC_CNTL … macro
Ddcn_3_0_1_offset.h7978 #define mmDP0_DP_SEC_CNTL … macro
Ddcn_1_0_offset.h8407 #define mmDP0_DP_SEC_CNTL … macro
Ddcn_2_1_0_offset.h9911 #define mmDP0_DP_SEC_CNTL … macro
Ddcn_3_0_2_offset.h9590 #define mmDP0_DP_SEC_CNTL … macro
Ddcn_2_0_0_offset.h11004 #define mmDP0_DP_SEC_CNTL … macro
Ddcn_3_0_0_offset.h10725 #define mmDP0_DP_SEC_CNTL … macro