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Searched refs:mmDC_I2C_DDC3_HW_STATUS_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_offset.h7413 #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX … macro
Ddcn_1_0_offset.h7680 #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX … macro
Ddcn_2_1_0_offset.h9274 #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX … macro
Ddcn_3_0_2_offset.h8960 #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX … macro
Ddcn_2_0_0_offset.h10305 #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX … macro
Ddcn_3_0_0_offset.h10033 #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h1649 #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX … macro