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Searched refs:mmDC_GPIO_PWRSEQ_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1271 #define mmDC_GPIO_PWRSEQ_MASK 0x1940 macro
Ddce_8_0_d.h1375 #define mmDC_GPIO_PWRSEQ_MASK 0x1940 macro
Ddce_10_0_d.h1666 #define mmDC_GPIO_PWRSEQ_MASK 0x4890 macro
Ddce_11_0_d.h1496 #define mmDC_GPIO_PWRSEQ_MASK 0x4890 macro
Ddce_11_2_d.h1595 #define mmDC_GPIO_PWRSEQ_MASK 0x4890 macro
Ddce_12_0_offset.h2048 #define mmDC_GPIO_PWRSEQ_MASK macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h5547 #define mmDC_GPIO_PWRSEQ_MASK macro
Ddcn_1_0_offset.h10575 #define mmDC_GPIO_PWRSEQ_MASK macro
Ddcn_2_1_0_offset.h11453 #define mmDC_GPIO_PWRSEQ_MASK macro
Ddcn_3_0_2_offset.h11531 #define mmDC_GPIO_PWRSEQ_MASK macro
Ddcn_2_0_0_offset.h12882 #define mmDC_GPIO_PWRSEQ_MASK macro
Ddcn_3_0_0_offset.h12686 #define mmDC_GPIO_PWRSEQ_MASK macro