Home
last modified time | relevance | path

Searched refs:mmDC_GPIO_PWRSEQ_A (Results 1 – 15 of 15) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/dc/gpio/dce110/
Dhw_translate_dce110.c169 case mmDC_GPIO_PWRSEQ_A: in offset_to_id()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/gpio/dce60/
Dhw_translate_dce60.c198 case mmDC_GPIO_PWRSEQ_A: in offset_to_id()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/gpio/dce80/
Dhw_translate_dce80.c198 case mmDC_GPIO_PWRSEQ_A: in offset_to_id()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1269 #define mmDC_GPIO_PWRSEQ_A 0x1941 macro
Ddce_8_0_d.h1376 #define mmDC_GPIO_PWRSEQ_A 0x1941 macro
Ddce_10_0_d.h1667 #define mmDC_GPIO_PWRSEQ_A 0x4891 macro
Ddce_11_0_d.h1497 #define mmDC_GPIO_PWRSEQ_A 0x4891 macro
Ddce_11_2_d.h1596 #define mmDC_GPIO_PWRSEQ_A 0x4891 macro
Ddce_12_0_offset.h2050 #define mmDC_GPIO_PWRSEQ_A macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h5549 #define mmDC_GPIO_PWRSEQ_A macro
Ddcn_1_0_offset.h10577 #define mmDC_GPIO_PWRSEQ_A macro
Ddcn_2_1_0_offset.h11455 #define mmDC_GPIO_PWRSEQ_A macro
Ddcn_3_0_2_offset.h11533 #define mmDC_GPIO_PWRSEQ_A macro
Ddcn_2_0_0_offset.h12884 #define mmDC_GPIO_PWRSEQ_A macro
Ddcn_3_0_0_offset.h12688 #define mmDC_GPIO_PWRSEQ_A macro