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Searched refs:mmD2VGA_CONTROL (Results 1 – 21 of 21) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Dcik.c979 d2vga_control = RREG32(mmD2VGA_CONTROL); in cik_read_disabled_bios()
991 WREG32(mmD2VGA_CONTROL, in cik_read_disabled_bios()
1005 WREG32(mmD2VGA_CONTROL, d2vga_control); in cik_read_disabled_bios()
Dvi.c604 d2vga_control = RREG32(mmD2VGA_CONTROL); in vi_read_disabled_bios()
616 WREG32(mmD2VGA_CONTROL, in vi_read_disabled_bios()
630 WREG32(mmD2VGA_CONTROL, d2vga_control); in vi_read_disabled_bios()
Ddce_v6_0.c1780 mmD2VGA_CONTROL,
Ddce_v8_0.c1744 mmD2VGA_CONTROL,
Ddce_v10_0.c1815 mmD2VGA_CONTROL,
Ddce_v11_0.c1857 mmD2VGA_CONTROL,
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_timing_generator.c398 offset = mmD2VGA_CONTROL - mmD1VGA_CONTROL; in dce120_timing_generator_disable_vga()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_timing_generator.c1810 addr = mmD2VGA_CONTROL; in dce110_timing_generator_disable_vga()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1042 #define mmD2VGA_CONTROL 0x00CE macro
Ddce_8_0_d.h5145 #define mmD2VGA_CONTROL 0xce macro
Ddce_10_0_d.h6028 #define mmD2VGA_CONTROL 0xce macro
Ddce_11_0_d.h6105 #define mmD2VGA_CONTROL 0xce macro
Ddce_11_2_d.h7779 #define mmD2VGA_CONTROL 0xce macro
Ddce_12_0_offset.h576 #define mmD2VGA_CONTROL macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h39 #define mmD2VGA_CONTROL macro
Ddcn_3_0_1_offset.h170 #define mmD2VGA_CONTROL macro
Ddcn_1_0_offset.h410 #define mmD2VGA_CONTROL macro
Ddcn_2_1_0_offset.h116 #define mmD2VGA_CONTROL macro
Ddcn_3_0_2_offset.h54 #define mmD2VGA_CONTROL macro
Ddcn_2_0_0_offset.h54 #define mmD2VGA_CONTROL macro
Ddcn_3_0_0_offset.h35 #define mmD2VGA_CONTROL macro