Home
last modified time | relevance | path

Searched refs:mmCP_MEC_ME2_UCODE_ADDR (Results 1 – 10 of 10) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h252 #define mmCP_MEC_ME2_UCODE_ADDR 0x305e macro
Dgfx_7_2_d.h254 #define mmCP_MEC_ME2_UCODE_ADDR 0x305e macro
Dgfx_8_0_d.h283 #define mmCP_MEC_ME2_UCODE_ADDR 0xf81c macro
Dgfx_8_1_d.h284 #define mmCP_MEC_ME2_UCODE_ADDR 0xf81c macro
/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Dgfx_v7_0.c2726 WREG32(mmCP_MEC_ME2_UCODE_ADDR, 0); in gfx_v7_0_cp_compute_load_microcode()
2729 WREG32(mmCP_MEC_ME2_UCODE_ADDR, 0); in gfx_v7_0_cp_compute_load_microcode()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6751 #define mmCP_MEC_ME2_UCODE_ADDR macro
Dgc_9_1_offset.h6975 #define mmCP_MEC_ME2_UCODE_ADDR macro
Dgc_9_2_1_offset.h7003 #define mmCP_MEC_ME2_UCODE_ADDR macro
Dgc_10_1_0_offset.h10231 #define mmCP_MEC_ME2_UCODE_ADDR macro
Dgc_10_3_0_offset.h9847 #define mmCP_MEC_ME2_UCODE_ADDR macro