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Searched refs:mmCM1_CM_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h2054 #define mmCM1_CM_CONTROL_BASE_IDX macro
Ddcn_3_0_3_offset.h3306 #define mmCM1_CM_CONTROL_BASE_IDX macro
Ddcn_3_0_1_offset.h4121 #define mmCM1_CM_CONTROL_BASE_IDX macro
Ddcn_1_0_offset.h4059 #define mmCM1_CM_CONTROL_BASE_IDX macro
Ddcn_2_1_0_offset.h4009 #define mmCM1_CM_CONTROL_BASE_IDX macro
Ddcn_3_0_2_offset.h4662 #define mmCM1_CM_CONTROL_BASE_IDX macro
Ddcn_2_0_0_offset.h4947 #define mmCM1_CM_CONTROL_BASE_IDX macro
Ddcn_3_0_0_offset.h4708 #define mmCM1_CM_CONTROL_BASE_IDX macro