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Searched refs:mmBL_PWM_PERIOD_CNTL (Results 1 – 12 of 12) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h478 #define mmBL_PWM_PERIOD_CNTL 0x1920 macro
Ddce_8_0_d.h1288 #define mmBL_PWM_PERIOD_CNTL 0x1920 macro
Ddce_10_0_d.h1575 #define mmBL_PWM_PERIOD_CNTL 0x4822 macro
Ddce_11_0_d.h1400 #define mmBL_PWM_PERIOD_CNTL 0x4822 macro
Ddce_11_2_d.h1480 #define mmBL_PWM_PERIOD_CNTL 0x4822 macro
Ddce_12_0_offset.h1864 #define mmBL_PWM_PERIOD_CNTL … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h5485 #define mmBL_PWM_PERIOD_CNTL … macro
Ddcn_1_0_offset.h10407 #define mmBL_PWM_PERIOD_CNTL … macro
Ddcn_2_1_0_offset.h11365 #define mmBL_PWM_PERIOD_CNTL … macro
Ddcn_3_0_2_offset.h11445 #define mmBL_PWM_PERIOD_CNTL … macro
Ddcn_2_0_0_offset.h12782 #define mmBL_PWM_PERIOD_CNTL … macro
Ddcn_3_0_0_offset.h12592 #define mmBL_PWM_PERIOD_CNTL … macro