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Searched refs:mmBL_PWM_GRP1_REG_LOCK (Results 1 – 12 of 12) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h477 #define mmBL_PWM_GRP1_REG_LOCK 0x1921 macro
Ddce_8_0_d.h1289 #define mmBL_PWM_GRP1_REG_LOCK 0x1921 macro
Ddce_10_0_d.h1576 #define mmBL_PWM_GRP1_REG_LOCK 0x4823 macro
Ddce_11_0_d.h1401 #define mmBL_PWM_GRP1_REG_LOCK 0x4823 macro
Ddce_11_2_d.h1481 #define mmBL_PWM_GRP1_REG_LOCK 0x4823 macro
Ddce_12_0_offset.h1866 #define mmBL_PWM_GRP1_REG_LOCK … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h5487 #define mmBL_PWM_GRP1_REG_LOCK … macro
Ddcn_1_0_offset.h10409 #define mmBL_PWM_GRP1_REG_LOCK … macro
Ddcn_2_1_0_offset.h11367 #define mmBL_PWM_GRP1_REG_LOCK … macro
Ddcn_3_0_2_offset.h11447 #define mmBL_PWM_GRP1_REG_LOCK … macro
Ddcn_2_0_0_offset.h12784 #define mmBL_PWM_GRP1_REG_LOCK … macro
Ddcn_3_0_0_offset.h12594 #define mmBL_PWM_GRP1_REG_LOCK … macro