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Searched refs:mmABM4_BL1_PWM_GRP2_REG_LOCK_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_2_offset.h14745 #define mmABM4_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
Ddcn_3_0_0_offset.h16343 #define mmABM4_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro